Dynamic DCI Bit Width Adjustment for Scheduling Sequence Optimization

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Solution Overview

Problem

Current radio telecommunications networks face inefficiencies in scheduling due to fixed bit widths in downlink control information (DCI) formats, leading to underutilization of scheduling sequences and increased memory resource allocation, which can be optimized by adjusting bit widths based on statistical models of sequence usability.

Innovation Solution

A network node adjusts the bit width of adjustable fields in the DCI format based on statistical models of scheduling sequence usability, optimizing the range of used sequences and reducing memory resource allocation by dynamically changing the bit width in response to usage reports from user equipment.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If fixed bit widths are used in DCI formats, then device complexity is reduced and ease of operation is improved, but scheduling sequence utilization is inefficient and memory resource allocation is increased

Engineering Contradiction:
Improvescheduling sequence utilizationVSAvoidDCI format complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements dynamic adjustment of bit widths for DCI format fields based on statistical analysis of scheduling sequence usability. The network node determines usage patterns of scheduling sequences and adapts the bit width allocation accordingly, transforming the static DCI format into a dynamic structure that optimizes scheduling sequence utilization while maintaining manageable complexity through automated adaptation

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of bit width for specific fields in the DCI format based on statistical models of scheduling sequence usage. By analyzing which scheduling sequences are actually used and adjusting the bit width parameters accordingly, the system optimizes the representation of scheduling information, reducing memory allocation for underutilized sequences while maintaining efficiency for frequently used sequences

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If larger bit widths are allocated to DCI fields, then the range of usable scheduling sequences is increased, but memory resource allocation is increased

Engineering Contradiction:
Improverange of usable scheduling sequencesVSAvoidmemory resource allocation
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The patent applies parameter changes by adjusting the bit width of DCI format fields based on statistical analysis of scheduling sequence usage patterns. The network node identifies which scheduling sequences are actually utilized and allocates bit width resources accordingly, increasing the range of usable sequences only where needed while reducing memory allocation for rarely used sequences

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent implements partial action by allocating bit width resources selectively rather than uniformly. Instead of providing maximum bit width for all possible scheduling sequences, the system provides sufficient bit width only for the subset of sequences that are actually used, as determined by statistical analysis, thereby optimizing memory resource allocation

Inventive Principle:
Principle #16Partial or excessive action

3Quantity of substance

If smaller bit widths are used in DCI formats, then memory resource allocation is reduced, but the range of usable scheduling sequences is decreased

Engineering Contradiction:
Improvememory resource allocationVSAvoidrange of usable scheduling sequences
Core Design Contradiction:
Quantity of substanceVSAdaptability or versatility

Solution Approach 1:

The patent dynamically changes the bit width parameter based on statistical analysis of scheduling sequence usability. Rather than using a fixed small bit width that would limit the range of usable sequences, the system analyzes actual usage patterns and adjusts bit width allocation to provide sufficient range for needed sequences while minimizing memory allocation for unused capacity

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent applies partial action by allocating bit width resources only to the extent necessary for actually used scheduling sequences. The statistical analysis identifies the minimum required bit width to support the observed range of usable sequences, avoiding allocation of excess memory resources while maintaining adequate adaptability

Inventive Principle:
Principle #16Partial or excessive action

4Productivity

If statistical models and dynamic adjustment are implemented, then scheduling sequence utilization is optimized, but device complexity and processing requirements are increased

Engineering Contradiction:
Improvescheduling sequence utilization efficiencyVSAvoidprocessing complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements self-service by enabling the network node to automatically perform statistical analysis of scheduling sequence usage and autonomously adjust DCI format bit widths without external intervention. The system monitors its own performance, identifies optimization opportunities through statistical modeling, and implements adjustments independently, thereby achieving high utilization efficiency while managing processing complexity through automated self-optimization

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent employs feedback mechanisms where the network node continuously monitors scheduling sequence usage patterns and uses this feedback to dynamically adjust DCI format parameters. The statistical model processes usage data and feeds back optimization decisions to the DCI format configuration, creating a closed-loop system that automatically improves scheduling sequence utilization while managing processing complexity through iterative refinement

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20240015763A1Scheduling in a radio telecommunications network
Publication Date: 2024.01.11 NOKIA TECHNOLOGIES OY
  • US20240015763A1 patent drawing
  • US20240015763A1 patent drawing
  • US20240015763A1 patent drawing

AI summary

A network node comprising means for: sending to a user equipment (UE) a downlink control information (DCI) format for encoding variable scheduling information as a scheduling sequence, wherein the scheduling information is for scheduling the UE for data communication, and wherein the DCI format uses different fields and at least one of the fields is an adjustable bit width field having a first bit width; using a scheduling sequence to communicate scheduling information to the UE, using the DCI format, by assigning values to the fields of the DCI format including the at least one field of the first bit width; in dependence upon use or usability of scheduling sequences within an adjustable range of possible scheduling sequences enabled by a variation in a bit width of the at least one adjustable bit width field of the DCI format, sending to the UE an adjusted DCI format for encoding variable scheduling information as a scheduling sequence, wherein the scheduling information is for scheduling the UE for data communication, and wherein the adjusted DCI format uses different fields and the at least one adjustable bit width field has a second bit width that is different to the first bit width; and using a scheduling sequence to communicate scheduling information to the UE, using the adjusted DCI format, by assigning values to the fields of the adjusted DCI format including the at least one adjustable bit width field of the second bit width.