Dynamic DDR Scaling for Memory Refresh Rate and Size Management

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Solution Overview

Problem

Memory usage requirements for certain use cases, such as those requiring specific bandwidth and latency levels for DDR RAM, can be stringent and are affected by memory temperature, leading to potential failures in meeting these requirements due to increased memory refresh rates.

Innovation Solution

The method involves comparing memory characteristics like refresh rate and size, along with use case parameters like bandwidth and latency, with stored data to select an appropriate memory frequency for configuration, and issuing an alarm if the use case parameters cannot be met.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the memory refresh rate is increased to maintain data integrity at higher temperatures, then the reliability of data storage is improved, but the bandwidth and latency performance deteriorates

Engineering Contradiction:
Improvedata integrityVSAvoidbandwidth and latency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements dynamic memory frequency scaling that adjusts the memory operating frequency based on real-time temperature conditions and refresh rate requirements. The system dynamically selects from multiple frequency configurations (e.g., 1066 MT/s, 1333 MT/s, 1600 MT/s) to optimize the balance between data integrity and performance, allowing the memory subsystem to adapt its characteristics rather than operating at a fixed frequency

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the memory operating parameters (frequency and refresh rate) based on temperature conditions. At higher temperatures, the system increases the refresh rate to maintain data integrity while selecting appropriate frequency configurations to mitigate performance degradation. This parameter adjustment allows the system to respond to thermal conditions while managing the trade-off between reliability and productivity

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the memory refresh rate is increased to maintain data integrity, then the reliability is improved, but the bandwidth decreases

Engineering Contradiction:
Improvedata integrityVSAvoidbandwidth
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system dynamically adjusts memory frequency based on the refresh rate requirements imposed by temperature conditions. When high refresh rates are needed for data integrity, the system selects lower frequency configurations to accommodate the increased refresh overhead, thereby maintaining optimal bandwidth utilization under varying thermal conditions

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements a mapping between refresh rate requirements and frequency selections. The system monitors temperature-induced refresh rate changes and correspondingly adjusts the memory frequency parameter to maintain acceptable bandwidth performance, creating a coordinated response to thermal conditions that manages both reliability and productivity

Inventive Principle:
Principle #35Parameter changes

3Reliability

If the memory refresh rate is increased to maintain data integrity, then the reliability is improved, but the latency increases

Engineering Contradiction:
Improvedata integrityVSAvoidlatency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system dynamically selects memory frequency configurations that account for latency implications of increased refresh rates. When temperature conditions require higher refresh rates, the system adjusts the operating frequency to minimize the impact on access latency, balancing the need for data integrity with the time-sensitive requirements of memory operations

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12265712B2Dynamic DDR scaling and use case management based on DDR refresh rate and size
Publication Date: 2025.04.01 QUALCOMM INC
  • US12265712B2 patent drawing
  • US12265712B2 patent drawing
  • US12265712B2 patent drawing

AI summary

Various embodiments include methods and devices for implementing scaling memory frequency configuration by a computing device. Embodiments may include comparing at least a memory refresh rate, a memory size, at least one use case bandwidth of transmission between the memory and a system on chip (SoC), and a use case latency of transmission between the memory and the SoC with at least one stored memory refresh rate, at least one stored memory size, at least one stored use case bandwidth of transmission between the memory and the SoC, and at least one stored use case latency of transmission between the memory and the SoC, selecting a memory frequency based on a result of the comparison, and configuring the memory for the memory frequency. Some embodiments may include issuing an alarm indicating changing the use for the memory to be able to achieve a use case parameter.