Dynamic Debug Pattern Configuration for Processor Error Detection
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Solution Overview
Problem
Conventional debugging techniques in processor-based systems face challenges in detecting dynamic pattern changes, making it difficult to trigger effective debugging actions due to the static nature of pattern comparison, which can lead to inefficiencies in error detection and reconstruction.
Innovation Solution
Implementing comparators that dynamically compare subsets of bits on a debug bus to predetermined patterns, allowing for the capture and modification of patterns to trigger debugging actions, and interconnecting sets of comparators to update matching patterns, ensuring aligned triggering and capture events.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional static pattern comparison is used for debugging, then device complexity is reduced, but the ability to detect dynamic error conditions deteriorates
Solution Approach 1:
The patent implements dynamic pattern comparison by allowing the captured values from the bus to automatically update the pattern stored in the pattern storage element. This enables the debugging system to adapt to changing error conditions dynamically, transforming the static comparison mechanism into a dynamic one that can detect evolving error patterns without requiring complex external intervention.
Solution Approach 2:
The debugging apparatus enables self-updating of debug patterns through automatic capture and transfer of bus values to the pattern storage element. The system serves itself by automatically learning and adapting to error patterns without requiring external reconfiguration, reducing the need for complex external debugging equipment and manual intervention.
2Adaptability or versatility
If dynamic pattern capture and updating is implemented, then error detection capability is improved, but device complexity increases
Solution Approach 1:
The patent divides the debugging system into distinct functional segments: a comparator that compares bus values against stored patterns, capture logic that captures matching values, and pattern storage that holds both fixed and dynamically captured patterns. This segmentation allows each component to perform its specific function with optimized complexity, rather than requiring a monolithic complex debugging unit.
Solution Approach 2:
The system pre-configures pattern storage elements with initial debug patterns before operation begins. These predetermined patterns are loaded in advance, allowing the system to immediately begin dynamic pattern matching without requiring complex real-time pattern generation logic during operation.
3Productivity
If multiple comparators are interconnected to update patterns dynamically, then debugging effectiveness is enhanced, but manufacturing complexity increases
Solution Approach 1:
The patent designs the comparators and pattern storage elements as universal, interchangeable components that can be replicated and interconnected in standardized configurations. Each comparator unit can serve multiple debugging functions by comparing against different patterns stored in the shared pattern storage, reducing manufacturing complexity through component standardization and reuse.
Solution Approach 2:
The system creates copies of bus values and pattern data through the capture logic and pattern storage elements. Instead of requiring complex real-time analysis of original bus signals, the system works with captured copies of the data, simplifying the manufacturing and operation of the debugging apparatus while maintaining full debugging capability.
Data Source
AI summary
The present invention provides a method and apparatus for dynamically configuring debug triggering patterns. One example embodiment of the method includes comparing values of bits received on a first subset of a plurality of lines of a bus with a first pattern of bits and capturing values of bits received on a second subset of the plurality of lines of the bus in response to the comparison indicating that the values of the bits received on the first subset of the lines match the first pattern of bits. The exemplary embodiment of the method also includes defining a second pattern for triggering a debug action using the captured values.