Dynamic Register Allocation in Display Control for High-Resolution Signals
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Solution Overview
Problem
Control devices with fixed register numbers and buffer widths struggle to support display devices with high horizontal resolutions, leading to potential system bus bandwidth limitations and errors in image display.
Innovation Solution
A control device with a storage module and a control module that dynamically sets the buffer width, used number, and occupied number of registers based on the horizontal resolution of the display device, allowing for variable register allocation and timely data transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the buffer width of registers is increased to support higher horizontal resolutions, then the support capability for display devices is improved, but the device complexity and cost increase
Solution Approach 1:
The patent divides the horizontal line signal into multiple segments, each stored in a separate register. Instead of requiring a single large buffer to hold all pixels of a horizontal line, the system uses multiple smaller registers (e.g., 4 registers for 1600 pixels with 400 pixels per register). This segmentation allows the system to support high-resolution displays while keeping individual register widths manageable and reducing overall system complexity.
Solution Approach 2:
The patent introduces a time dimension by sequentially outputting data from multiple registers over different clock cycles. Instead of requiring all pixel data to be available simultaneously in a single wide buffer, the system distributes data across multiple time slots, with each register contributing to the complete horizontal line output in sequence. This transforms a spatial buffering problem into a temporal transmission solution.
2Reliability
If the buffer width of registers is increased to prevent data transmission delays, then the image display reliability is improved, but the system bus bandwidth requirement increases
Solution Approach 1:
The patent employs periodic data transmission from multiple registers in a cyclic manner. Each register outputs its stored pixel data at regular intervals through multiple clock cycles, creating a periodic transmission pattern. This approach ensures reliable image display by systematically delivering all pixel data while distributing the bandwidth requirement across multiple time periods, preventing data transmission delays without demanding excessive peak bandwidth.
3Adaptability or versatility
If multiple registers are used to support high horizontal resolutions, then the adaptability to different resolutions is improved, but the control complexity increases
Solution Approach 1:
The patent implements dynamic configuration of register usage based on the actual horizontal resolution of the connected display device. The control device can adjust the number of registers utilized and the buffer width allocated to each register according to the specific resolution requirements. This dynamic adaptability allows the system to optimize performance for different resolutions while minimizing control complexity by only activating the necessary number of registers for each display configuration.
Data Source
AI summary
A control device includes a storage module and a control module. The storage module includes a plurality of registers. The control module sets the buffer width of the registers, the used number of the registers and the occupied number that a horizontal line signal occupies the registers according to the horizontal resolution. The control module receives the horizontal line signal. The control module assigns a plurality of pixels of the horizontal line signal to the registers. The control module sequentially outputs pixels of the horizontal line signal from the registers.