Dynamic Domain Identifier Assignment for Multi-Processor Access Control
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Solution Overview
Problem
Existing resource domain controllers in data processing systems have static domain assignments, which limit dynamic flexibility and robust access control, particularly for system bus transactions among multiple processors.
Innovation Solution
The Extended Resource Domain Controller (XRDC) enables dynamic domain assignments and a scalable access control framework, using master domain assignment controllers to generate domain identifiers for processors and non-processor resources, integrating access control policies and monitoring all accesses to enforce hierarchical access control mechanisms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If static domain assignments are used in resource domain controllers, then system simplicity is maintained, but dynamic flexibility and robust access control are limited
Solution Approach 1:
The patent implements dynamic domain assignment by allowing domain identifiers to be programmatically configured and changed at runtime. The resource domain controller can dynamically assign different domain identifiers to processors based on configuration registers, enabling flexible adaptation to different operational scenarios without hardware reconfiguration.
Solution Approach 2:
The system changes the parameter of domain identifier assignment from static to dynamic by introducing configuration registers that can be programmed to define domain memberships. This allows the domain structure to be reconfigured by changing parameter values in registers rather than requiring physical reconfiguration.
2Reliability
If static domain assignments are used, then device complexity is reduced, but access control robustness among multiple processors deteriorates
Solution Approach 1:
The patent segments the system into multiple resource domains, each with its own domain identifier. This segmentation allows independent access control policies to be enforced for each domain, improving robustness by isolating access control decisions to specific domain contexts rather than using a monolithic control structure.
Solution Approach 2:
The resource domain controller implements feedback mechanisms by comparing domain identifiers of accessing processors with authorized domain configurations stored in registers. This feedback loop ensures that only processors with matching domain identifiers can access protected resources, providing robust access control verification.
3Adaptability or versatility
If dynamic domain assignments are implemented, then system flexibility is improved, but the complexity of access control policies increases
Solution Approach 1:
The patent creates a universal domain identifier mechanism that serves multiple functions: it identifies processors, defines domain memberships, and enables access control decisions. This multi-functional approach reduces overall system complexity by using a single domain identifier framework rather than separate mechanisms for each function.
Solution Approach 2:
The domain identifier acts as an intermediary between processors and protected resources. Instead of implementing complex direct access control logic between each processor and resource, the domain identifier mediates access by providing a common reference that both the processor and resource can use to verify authorization.
Data Source
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AI summary
A master domain assignment controller includes a first plurality of registers corresponding to a first processor including a first register corresponding to a first set of process identifiers (PIDs) and a second register corresponding to a second set of PIDs, and comparison circuitry. The comparison circuitry is coupled to receive an input PID from the first processor and is configured to determine if the input PID is one of the first set or the second set of PIDs. When the input PID is one of the first set of PIDs, a first output domain identifier (DID) is generated, and when the input PID is one of the second set of PIDs, a second output DID different from the first output DID is generated.