Dynamic DPU Core Configuration for VR Display Power
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Solution Overview
Problem
Current display processing techniques for virtual reality applications fail to effectively manage multiple display processing unit (DPU) cores and synchronize timing between them, particularly when handling both high and low resolution user content.
Innovation Solution
The system selectively drives displays via controllers of DPU cores based on content resolution, using a multiplexer to manage display timing and synchronize DPU operations, allowing for reduced power consumption and synchronized timing across multiple cores.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple DPU cores are used to handle both high and low resolution content simultaneously, then display processing capability is improved, but power consumption increases
Solution Approach 1:
The system dynamically configures DPU core operation modes based on content resolution requirements. When low resolution content is detected, the system switches to single-DPU mode with the second DPU core powered down. When high resolution content is detected, the system activates both DPU cores to work in parallel. This dynamic adaptation allows the system to optimize power consumption while maintaining display processing capability.
Solution Approach 2:
The system changes the operational parameters of the DPU cores based on the resolution of the content being processed. By detecting whether content is high or low resolution, the system adjusts the number of active DPU cores and their respective processing loads, thereby optimizing the balance between processing capability and power consumption.
2Productivity
If multiple DPU cores operate independently, then processing throughput is improved, but timing synchronization becomes difficult
Solution Approach 1:
The system merges the timing control of multiple DPU cores through a unified timing signal distribution mechanism. A master timing signal is generated and distributed to both DPU cores, ensuring that they operate in synchronization despite processing different resolution content independently. This allows the system to maintain both high processing throughput and reliable timing synchronization.
3Use of energy by moving object
If a single DPU core processes all content, then power consumption is reduced, but display processing performance decreases
Solution Approach 1:
The system segments the display processing workload between one or two DPU cores based on content resolution requirements. For low resolution content, only one DPU core is activated, reducing power consumption. For high resolution content, both DPU cores are activated and work in parallel, maintaining high display processing performance. This segmentation approach allows the system to optimize both power consumption and performance dynamically.
Data Source
AI summary
This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for a power efficient display architecture. A display processor may obtain an indication that UC is to be displayed at a first resolution or a second resolution, where the first resolution is higher than the second resolution. The display processor may drive a first display via a first controller of a first DPU based on the indication. The display processor may drive a second display via a controller of a second DPU if the UC is to be displayed at the first resolution, or drive the second display via a second controller of the first DPU if the UC is to be displayed at the second resolution.