Dynamic Dummy Pulse Counting for Nonvolatile Memory Security
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Solution Overview
Problem
Nonvolatile memory cells, particularly those with floating gate transistors, face limited endurance due to repeated charge transfer, leading to increased erase or program pulses over time, and dummy operations can be distinguished from regular operations by counting pulses, posing a security risk.
Innovation Solution
Implementing a method that includes a first erase or program cycle for regular data and a second cycle for fake data, where the number of pulses in the second cycle is determined based on the pulses applied during the first cycle, ensuring both types of operations have similar pulse counts and reducing the risk of pulse-based differentiation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dummy erase or program cycles are performed on memory cells to mask write operations, then security against detection is improved, but the memory cells age more quickly due to increased pulse counts
Solution Approach 1:
The patent applies dynamics by making the number of pulses in dummy cycles variable rather than fixed. The control circuit dynamically adjusts the pulse count in dummy erase or program cycles to match the pulse count observed in regular data cycles, allowing the system to adapt to aging effects and maintain indistinguishability between dummy and regular operations throughout the memory cell's lifetime
Solution Approach 2:
The patent changes the parameter of pulse count in dummy cycles from a static predetermined value to a dynamic value that mirrors the pulse count of regular cycles. By monitoring and replicating the actual pulse count behavior of regular operations, the system maintains parameter parity between dummy and regular cycles, preventing detection while accounting for aging-induced variations
2Duration of action of stationary object
If the number of pulses in dummy cycles is kept low to preserve memory cell life, then memory cell endurance is improved, but dummy operations can be distinguished from regular operations by pulse counting
Solution Approach 1:
The patent implements feedback by having the control circuit monitor the pulse count of regular data cycles and use this information to adjust the pulse count in subsequent dummy cycles. This feedback loop ensures that dummy cycles replicate the characteristics of regular cycles, making them indistinguishable while managing memory cell stress through intelligent pulse allocation
3Reliability
If verification steps are performed in dummy cycles to match regular cycle behavior, then indistinguishability between dummy and regular operations is improved, but operation time increases
Solution Approach 1:
The patent applies partial action by selectively performing verification steps in dummy cycles based on what is necessary to match the external behavior of regular cycles. Rather than fully replicating all internal verification steps, the system performs only the essential pulse sequences and timing characteristics that make dummy cycles indistinguishable from regular cycles to an external observer, thereby reducing time overhead
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach extends the life of memory cells by evenly distributing pulses between regular and dummy operations, enhancing security by making it harder to distinguish between them based on pulse counts.
Implementation Method 1
A floating gate transistor is programmed by applying voltage pulses ('program pulses') to its source or drain region, or through its bulk region, to inject electrical charges into the floating gate. Conversely, it is erased by applying voltage pulses ('erase pulses') to its control gate or through the bulk region, to extract electrical charges from the floating gate.
Data Source
AI summary
In a general aspect, a method of writing data in a nonvolatile memory can include performing a first erase or program cycle to write regular data in a first memory cell of the non-volatile memory by (i) applying at least one erase or program pulse to the first memory cell and (ii) determining the state, erased or programmed, of the first memory cell, and repeating (i) and (ii) if the first memory cell is not in the desired state. The method can also include applying a predetermined number of erase or program pulses to write fake data in a second memory cell.