Dynamic ECC Memory Management for Power and Capacity Balance
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Solution Overview
Problem
Existing memory devices face challenges in optimizing power consumption and storage capacity due to varying Bit Error Rate (BER) throughout their life cycle, as conventional Error Correction Code (ECC) systems are typically calibrated for a defined status and consume excessive power.
Innovation Solution
The system dynamically adjusts ECC protection levels based on the health of memory cells, reallocating parity cells for storing parity data or additional payload, thereby optimizing power consumption and storage capacity by varying the number of parity bits used according to the cell's status.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ECC protection is calibrated for end-of-life reliability, then reliability is improved, but power consumption increases excessively
Solution Approach 1:
The ECC protection level is made dynamic rather than static. The system adjusts the ECC correction capability based on the actual health status and Bit Error Rate of memory cells at different times during their lifecycle. When cells are healthy, lower ECC protection is applied; when cells degrade, higher protection is activated, optimizing the balance between reliability and power consumption throughout the device's life.
Solution Approach 2:
The system changes the ECC protection parameters dynamically based on measured Bit Error Rate and cell health status. By monitoring error rates and adjusting the number of parity bits and correction capability accordingly, the system adapts the reliability level to match actual needs, avoiding excessive power consumption while maintaining adequate protection.
2Reliability
If maximum ECC correction capability is used, then reliability is improved, but storage capacity decreases due to more parity cells
Solution Approach 1:
The allocation of parity cells is made dynamic. The system adjusts the number of parity bits based on actual error rates and cell health status. When memory cells are healthy, fewer parity cells are used, increasing storage capacity. When cells degrade and error rates increase, more parity cells are allocated, improving reliability while minimizing the impact on storage capacity.
Solution Approach 2:
The system dynamically changes the ECC parameters including the number of parity bits and correction capability based on monitored Bit Error Rate. This allows the storage capacity to be maximized during early device life when cells are healthy, while ensuring adequate reliability protection is maintained as cells age and degrade.
Data Source
AI summary
The present disclosure relates to defining a minimum number of parity cells for storing parity data, the minimum number of parity cells corresponding to a minimum Error Correction Code (ECC) correction capability, defining a maximum number of parity cells for storing the parity data, the maximum number of parity cells corresponding to a maximum ECC correction capability, storing payload content in a plurality of memory cells of a memory array, and, based on a current status of the memory cells storing the payload, selecting a number of parity cells to be used for storing the parity data between the minimum number and the maximum number. The payload is stored in at least part of the parity cells which are not selected to store parity data. Related memory devices and systems are also herein disclosed.