Dynamic ECC Memory Control for Lower Power Overhead

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Solution Overview

Problem

Automotive computing systems face challenges in efficiently utilizing resources due to the high power overhead of error correction coding (ECC) memories, which are necessary for data resilience but consume significant DC power even when not required.

Innovation Solution

A scalable architecture for configurable dynamic ECC memory that includes a finite state machine (FSM) and control status registers (CSRs) to dynamically enable or disable ECC functionality based on workload, partitioning memory groups, and using pseudo registers for data transfer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If ECC memory is used to ensure data resilience, then reliability is improved, but power consumption increases

Engineering Contradiction:
Improvedata resilienceVSAvoidDC power overhead
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic ECC enablement/disablement through control status registers (CSRs) that allow the ECC functionality to be adjusted based on operational requirements. The system transitions from static ECC always-on to dynamic ECC control, where ECC can be enabled or disabled per memory group based on workload and reliability requirements, thereby reducing unnecessary power consumption while maintaining data resilience when needed.

Inventive Principle:
Principle #15Dynamics

2Reliability

If ECC functionality is always enabled, then data error protection is maintained, but power efficiency deteriorates

Engineering Contradiction:
Improveerror protectionVSAvoidpower overhead
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent applies local quality by allowing different memory groups to have different ECC configurations through individual control status registers. Each memory group can be independently configured with ECC enabled or disabled based on its specific requirements, rather than applying a uniform ECC setting across all memory. This granular control optimizes power efficiency by enabling ECC only where and when needed.

Inventive Principle:
Principle #3Local quality

3Use of energy by moving object

If configurable dynamic ECC control is implemented, then power efficiency is improved, but device complexity increases

Engineering Contradiction:
Improvepower consumptionVSAvoidcontrol architecture
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent segments the memory system into multiple memory groups, each with its own control status register for ECC configuration. This segmentation allows independent control of ECC functionality across different memory regions, enabling fine-grained power management. The segmentation approach manages complexity by organizing the control architecture into manageable, repeatable units rather than requiring a monolithic control system.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20260003727A1Scalable architecture for configurable dynamic error correction coding (ECC) memory
Publication Date: 2026.01.01 QUALCOMM INC
  • US20260003727A1 patent drawing
  • US20260003727A1 patent drawing
  • US20260003727A1 patent drawing

AI summary

Aspects of the disclosure are directed to dynamic error correction coding (ECC) disable control. In accordance with one aspect, the disclosure includes assigning each of a plurality of control status registers (CSRs) to each of a plurality of memory groups referenced by a group index to an indicator for error correction coding (ECC) disablement; and performing a dynamic ECC disablement for a plurality of data words for writing to one of the plurality of memory groups according to the indicator in an assigned each of the plurality of CSRs.