Dynamic Element Matching in Multi-Bit DACs for Linearity
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Solution Overview
Problem
Multi-bit digital-to-analog converters (DACs) suffer from non-linearities due to device mismatches and layout parasitics, leading to severe linearity degradations in digital to analog conversion.
Innovation Solution
A dynamic element matching system is implemented, comprising sequential register groups, decode circuitry, and pointer control circuitry. The system pseudo-randomly determines which registers are enabled or disabled based on the level of the digital input signal and the positions of cyclic pointers, effectively scrambling element selection to counteract mismatch errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a multi-bit DAC driven by a thermometer decoder is used, then excellent monotonous performance is achieved, but severe linearity degradations occur due to device mismatches and layout parasitics
Solution Approach 1:
The patent applies dynamic element matching by making the element selection dynamic rather than static. The thermometer decoder is modified to dynamically select which DAC elements are activated based on pseudo-random sequences, allowing the system to maintain monotonicity while distributing mismatch errors across multiple elements over time, thereby improving linearity performance
Solution Approach 2:
The patent converts the harmful effect of device mismatches and layout parasitics into beneficial white noise through dynamic scrambling. By pseudo-randomly permuting the activation sequence of DAC elements, the systematic mismatch errors are transformed into random noise that can be filtered out, improving the spurious-free dynamic range while maintaining excellent monotonous performance
2Manufacturing precision
If calibration schemes are used to address mismatch errors, then linearity performance is improved, but the system becomes complex and costly
Solution Approach 1:
The patent implements a self-calibrating system where the dynamic element matching circuitry automatically compensates for mismatch errors without requiring external calibration equipment or complex calibration algorithms. The pseudo-random permutation and correlation processing inherently perform the calibration function, eliminating the need for separate calibration schemes and reducing overall system complexity
Solution Approach 2:
The patent replaces complex analog calibration circuits and mechanical adjustment mechanisms with digital signal processing techniques. By using pseudo-random sequences and correlation processing in the digital domain, the system achieves calibration functionality without requiring complex analog components or manual adjustment mechanisms, thereby reducing device complexity and cost
Data Source
AI summary
A dynamic element matching system including sequential register groups, decode circuitry, and pointer control circuitry. Each register group includes at least two registers. The decode circuitry controls a state of each register group based on a level of a digital input signal, a relative position with respect to a begin pointer and an end pointer, and a corresponding one of multiple pseudo random probability values. The pointer control circuitry cyclically advances the end pointer among the register groups causing decode circuitry to add one or more register groups and enable a register within each added register group in response to the level of the digital input signal increasing, and also cyclically advances the begin pointer among the register groups causing the decode circuitry to remove one or more register groups and disable a register within each removed register group in response to the level of the digital input signal decreasing.