Dynamic Fabric Quiescence for In-Flight Transaction Drain
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Solution Overview
Problem
In-flight transactions between subsystems and programmable fabric cores of field-programmable gate arrays (FPGAs) are at risk during shutdown, leading to potential errors and dropped transactions due to the lack of effective power management solutions.
Innovation Solution
A network-on-chip (NOC) is utilized to provide fence and drain functionality, ensuring that shutdown occurs after in-flight transactions are resolved, thereby preventing new transactions and simplifying traffic control during power down.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the FPGA is shut down immediately, then power consumption is reduced quickly, but in-flight transactions are dropped causing errors
Solution Approach 1:
The patent applies preliminary action by initiating a quiescence period before the actual shutdown. During this period, the fabric is prepared for shutdown by completing all in-flight transactions first. The shutdown sequence is divided into: (1) entering quiescence state where no new transactions are accepted, (2) waiting for all in-flight transactions to complete naturally, and (3) then performing the actual power down. This preliminary preparation ensures transaction reliability while still achieving power reduction.
Solution Approach 2:
The quiescence period acts as a cushioning mechanism between the active state and shutdown state. During quiescence, the system maintains power to the fabric but stops accepting new transactions, creating a buffer zone that allows ongoing transactions to complete safely. This cushioning period prevents the harmful effect of abrupt transaction termination while enabling the transition to low-power state.
2Reliability
If the quiescence period is extended to ensure all transactions complete, then transaction reliability improves, but shutdown time increases
Solution Approach 1:
The patent implements feedback mechanisms to monitor the quiescence process. Transaction completion status is tracked and fed back to the control logic, which dynamically adjusts the shutdown timing. When all in-flight transactions are detected as complete, the system receives feedback and proceeds with shutdown. This feedback-driven approach ensures reliability while minimizing unnecessary waiting time, as the system shuts down as soon as transactions are complete rather than using fixed conservative timeouts.
Solution Approach 2:
The quiescence period is implemented dynamically rather than as a fixed duration. The system continuously monitors transaction states and adjusts the quiescence duration based on actual transaction completion rates and patterns. This dynamic adaptation allows the system to achieve reliable transaction completion while optimizing shutdown time, avoiding both premature shutdowns and unnecessarily long waits.
3Ease of operation
If traffic control mechanisms are simplified for power management, then ease of operation improves, but control over in-flight transactions is reduced
Solution Approach 1:
The patent applies self-service by enabling the fabric to automatically manage its own quiescence and shutdown process without requiring complex external control mechanisms. The fabric monitors its own transaction states and autonomously determines when it is safe to shutdown. This self-managed approach simplifies the overall power management interface while maintaining precise control over transaction completion, as the fabric's inherent transaction tracking capabilities are leveraged for automatic quiescence management.
Data Source
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AI summary
An integrated circuit includes a network-on-chip and a core fabric coupled to the network-on-chip. Additionally, the integrated circuit also includes a voltage regulator configured to regulate a voltage rail to the core fabric. Furthermore, the integrated circuit includes a power management processor that is configured to control whether power is provided to the core fabric from the voltage regulator via the voltage rail. Moreover, the power management processor is configured to fence and drain the network-on-chip by causing the network-on-chip to deliver inflight transactions to and from the core fabric before a change in power provided to the core fabric via the voltage rail occurs.