Dynamic Fault Reconfiguration for Memory Repair
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Solution Overview
Problem
Existing memory repair technologies require additional time and cost due to the need to analyze fault information after completing memory tests, leading to increased overall test and repair times.
Innovation Solution
A memory repair solution finding device and method that simultaneously collects and analyzes fault information during memory testing, dynamically reconfiguring fault information storage locations to minimize repair solution searching time by using a combination of main and sub fault information memories and a controller to manage spare resources effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If fault information is analyzed after finishing memory test, then optimal repair rate is ensured, but repair time is additionally required
Solution Approach 1:
The patent applies preliminary action by pre-organizing fault information during the memory test process itself. The fault information memory continuously stores and reconfigures fault addresses as they are detected, rather than waiting until testing completes. This preliminary organization of data enables immediate repair solution generation without additional analysis time after testing.
Solution Approach 2:
The system maintains continuous useful action by operating the fault information memory throughout the entire test duration. The memory continuously receives, stores, and reconfigures fault information without interruption, transforming the batch processing approach into a continuous process that eliminates idle time between testing and repair analysis.
2Reliability
If fault information is analyzed at one time after memory test, then optimal repair rate is ensured, but overall test and repair time increases
Solution Approach 1:
The fault information memory performs preliminary organization of fault data during testing, preparing repair solutions in advance. This pre-processing eliminates the need for time-consuming batch analysis after testing, thereby improving overall productivity while maintaining repair quality.
Solution Approach 2:
The system dynamically reconfigures fault information in real-time during the testing process. The fault information memory adaptively updates storage locations and reorganizes data as new faults are detected, transforming a static batch-processing system into a dynamic real-time system that improves efficiency.
3Reliability
If fault information is stored in separate fault information memory, then fault analysis is enabled, but hardware overhead increases
Solution Approach 1:
The fault information memory is designed with multi-functionality, serving both as a temporary storage buffer during testing and as the final repository for repair solution generation. This universal component eliminates the need for separate dedicated fault storage and analysis hardware, reducing overall system complexity while maintaining full fault analysis capability.
Solution Approach 2:
The patent merges the fault information storage function with the existing memory test infrastructure. By integrating the fault information memory into the test system and combining its operations with the testing process, the system reduces hardware overhead while preserving complete fault analysis functionality.
Data Source
AI summary
The present embodiments provides a memory repair solution finding device and method which find a fault by testing a memory and find a repair solution in parallel and dynamically reconfigure the stored fault information to minimize a repair solution searching time with an optimal repair rate.