Dynamic Parallelism Adjustment in FPGA Processing
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Solution Overview
Problem
In parallel processing systems, such as FPGAs, there is a trade-off between parallelism and power efficiency, where increasing parallelism improves performance but decreases power efficiency and increases operational costs, and fixed parallelism may result in incomplete data processing within the desired target time, especially in applications like image search processing where processing time varies with data characteristics.
Innovation Solution
A parallel processing apparatus that dynamically adjusts parallelism based on the estimated operation time and data amount for each data portion, using a control circuit to determine the optimal number of operational circuits to execute operations, ensuring completion within the target time while minimizing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If parallelism is increased to improve processing performance, then processing speed is improved, but power consumption increases and power efficiency deteriorates
Solution Approach 1:
The patent implements dynamic parallelism adjustment by monitoring processing progress and recalculating parallelism levels during data processing. The control circuit adjusts the number of operational circuits based on remaining data amount and elapsed time, transitioning from fixed to dynamic parallelism configuration to optimize the balance between processing speed and power consumption throughout the processing lifecycle.
Solution Approach 2:
The system changes the parallelism parameter dynamically during processing by calculating optimal parallelism values based on processing progress, remaining data amount, and time constraints. This parameter adjustment allows the system to use higher parallelism when needed for speed and lower parallelism when sufficient progress has been made, thereby reducing overall power consumption while maintaining productivity.
2Device complexity
If fixed parallelism is used to simplify control, then device complexity is reduced, but processing completion within target time cannot be guaranteed
Solution Approach 1:
The patent implements feedback control by monitoring processing progress, comparing elapsed time against target time, and adjusting parallelism levels accordingly. The control circuit receives feedback on processing status and dynamically modifies operational circuit allocation to ensure target time completion while avoiding excessive complexity through automated decision-making based on simple feedback metrics.
3Loss of time
If maximum parallelism is used to ensure completion within target time, then processing speed is improved, but power efficiency deteriorates
Solution Approach 1:
The system applies partial parallelism rather than maximum parallelism throughout processing. By calculating the exact parallelism needed based on remaining work and time constraints, the system uses only the necessary computational resources at each stage, avoiding the excessive power consumption that would result from maintaining maximum parallelism throughout the entire processing duration.
Data Source
AI summary
A parallel processing apparatus includes, a plurality of operational circuits that execute operations for data in parallel, and a control circuit that, upon an end of operations for a first portion of the data, finds estimated operation time for operations for a second portion that is an object of operations subsequent to the first portion, based on target time for operational processing for the data and a data amount of remaining data for which no operation has been executed in the data, finds a second parallelism of the operations for the second portion, based on a first parallelism of the operations for the first portion, a measurement value of operation time for the operations for the first portion, and the estimated operation time, and causes operational circuits, numbering in a number indicated by the second parallelism among the plurality of operational circuits, to execute the operations for the second portion.