Dynamic Frequency Voltage Regulator for Memory Systems
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Solution Overview
Problem
Existing semiconductor memory systems face challenges in stabilizing voltage supply to memory devices, particularly in mobile devices, where voltage fluctuations can affect performance and reliability, and existing solutions do not adequately manage voltage peaks to prevent transistor damage.
Innovation Solution
A voltage regulator system that includes a pump, capacitor, voltage divider, comparators, and clock frequency driver to adjust the pump-out voltage frequency based on reference voltages, reducing peak voltage and preventing transistor damage by switching between first and second frequencies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a voltage regulator is provided to stably supply control voltage to memory devices, then voltage stability is improved, but device complexity increases due to additional components
Solution Approach 1:
The patent implements dynamic frequency adjustment of the pump circuit based on real-time voltage detection. The system switches between first and second frequencies depending on whether the pump-out voltage exceeds the first or second reference voltage, creating a dynamic response mechanism that improves voltage stability without requiring overly complex static structures
Solution Approach 2:
The voltage regulator employs feedback mechanisms through detection circuits that continuously monitor the pump-out voltage and compare it against reference voltages. This feedback loop enables the system to automatically adjust its operation to maintain voltage stability, resolving the contradiction between reliability and complexity through intelligent control
2Power
If pump-out voltage is increased to meet memory device requirements, then power delivery capability is improved, but risk of transistor damage increases due to voltage peaks
Solution Approach 1:
The detection circuit provides continuous feedback on the pump-out voltage level, enabling the control circuit to switch frequencies based on voltage conditions. This feedback mechanism prevents voltage peaks from damaging transistors while maintaining sufficient power delivery capability by adjusting operation dynamically
Solution Approach 2:
The system dynamically adjusts the pump circuit frequency based on real-time voltage conditions. By switching between first and second frequencies, the system can deliver adequate power when needed while preventing harmful voltage peaks, thus resolving the contradiction between power capability and transistor protection
3Speed
If clock frequency is increased to improve voltage regulation response, then voltage regulation speed is improved, but power consumption increases
Solution Approach 1:
The patent implements dynamic frequency adjustment, switching between first and second clock frequencies based on voltage conditions. The system uses higher frequency only when voltage regulation is needed (when pump-out voltage exceeds reference), and switches to lower frequency when stable, reducing overall power consumption while maintaining fast response when required
Solution Approach 2:
The system employs periodic frequency adjustment based on voltage detection cycles. By alternating between high and low frequencies according to voltage conditions, the system achieves effective voltage regulation at appropriate speeds while minimizing unnecessary high-frequency operation that would increase power consumption
Data Source
AI summary
Provided herein are a voltage regulator, a memory system having the same and an operation method thereof. The memory system includes a memory device configured to store data, a controller configured to control the memory device, and a voltage regulator configured to supply a pump-out voltage to the memory device or the controller so that the memory device or the controller is operated in the following manner: until a level of the pump-out voltage is increased to a second reference voltage lower than a first reference voltage, the pump-out voltage is output using a clock having a first frequency; when the pump-out voltage exceeds the second reference voltage and does not exceed the first reference voltage, the pump-out voltage is output using a clock having a second frequency lower than the first frequency; and when the pump-out voltage exceeds the first reference voltage, the pump-out voltage is output using the clock having the first frequency.