Dynamic Gate Biasing for Switch Off-State Voltage Overshoot
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Solution Overview
Problem
Transistor-based switches in single-ended and differential signal systems face issues where they turn on when they should be off due to voltage overshoots or undershoots, leading to increased area costs and load capacitance when multiple transistors are used to address these problems.
Innovation Solution
A switch configuration using a single NMOS and PMOS transistor pair, with biasing circuits that output the lowest or highest voltage between the signal pads and ground or supply, respectively, to ensure the transistors remain off during voltage extremes, reducing the need for multiple transistors and minimizing area costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple sets of transistors are used to prevent switch turn-on during voltage overshoots, then reliability is improved, but area costs and load capacitance increase
Solution Approach 1:
The patent changes the voltage parameter applied to the transistor gate by introducing a biasing circuit that dynamically adjusts the gate voltage based on the voltages at the switch terminals. This allows a single transistor to maintain reliable off-state even when terminal voltages exceed supply or go below ground, eliminating the need for multiple transistor sets while preserving area efficiency.
2Reliability
If multiple sets of transistors are used to prevent switch turn-on during voltage overshoots, then reliability is improved, but load capacitance increases
Solution Approach 1:
The biasing circuit dynamically adjusts the gate voltage parameter to track the terminal voltages, ensuring the transistor remains firmly in the off-state during voltage overshoots. This single-transistor approach with dynamic biasing produces less load capacitance compared to multiple parallel transistor sets, as it eliminates redundant transistor structures while maintaining reliability.
3Reliability
If transistors are sized to achieve predetermined resistance, then differential termination performance is improved, but area costs increase
Solution Approach 1:
The patent applies parameter changes to the gate voltage through the biasing circuit, which allows a single transistor to achieve the required off-state reliability during voltage overshoots. This eliminates the need to use multiple oversized transistors in parallel to achieve predetermined resistance, as the dynamic biasing enables precise control with minimal transistor area while maintaining differential termination performance.
Data Source
AI summary
An apparatus includes: a switch having a first transistor, the first transistor having a gate, wherein the switch is connected between a first pad and a second pad; and a first biasing circuit coupled to the gate of the first transistor, wherein the first biasing circuit is configured for outputting a first voltage, the first voltage being the lowest one of (1) a voltage of the first pad, (2) a voltage of the second pad, and (3) a ground voltage; wherein the gate of the first transistor is driven by the first voltage from the first biasing circuit in response to an enable signal being set for configuring the switch to be off.