Dynamic Gate Drive Voltage Adjustment in DC-DC Buck Converters

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Solution Overview

Problem

Conventional DC-DC buck converters operate inefficiently due to fixed gate drive voltage, which is not optimized in response to varying output current, leading to suboptimal power dissipation and efficiency.

Innovation Solution

A gate drive voltage controller, such as an ASIC, µC, DSP, or FPGA, adjusts the gate drive voltage in small steps based on output current and voltage information to maximize efficiency, using a voltage regulator and look-up tables for optimal performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If fixed gate drive voltage is used, then device complexity is reduced, but efficiency deteriorates under varying load conditions

Engineering Contradiction:
Improvepower dissipationVSAvoidgate drive voltage control circuit
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The gate drive voltage is made dynamic rather than fixed, allowing it to adjust in response to varying output current conditions. The controller modifies the gate drive voltage level based on real-time feedback about the converter's operating state, enabling optimal efficiency across different load conditions while managing the increased system complexity through integrated control circuitry.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention changes the operating parameter of gate drive voltage from a constant value to a variable parameter that adapts to load conditions. By monitoring output current and adjusting the gate drive voltage accordingly, the system optimizes the balance between switching speed and power dissipation, resolving the contradiction between fixed simplicity and variable efficiency.

Inventive Principle:
Principle #35Parameter changes

2Speed

If gate drive voltage is increased, then switching speed improves, but power dissipation increases

Engineering Contradiction:
Improveswitching frequencyVSAvoiddriver power dissipation
Core Design Contradiction:
SpeedVSLoss of energy

Solution Approach 1:

The gate drive voltage is dynamically adjusted based on the actual switching requirements and load conditions. Rather than using a constantly high voltage to ensure fast switching, the controller modulates the gate drive voltage to provide just enough drive strength for the required switching speed, thereby reducing unnecessary power dissipation in the driver circuit.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention changes the gate drive voltage from a fixed high value to a variable parameter that adapts to switching requirements. By optimizing the gate drive voltage level according to load conditions and switching frequency requirements, the system achieves the necessary switching speed while minimizing driver power dissipation.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentEP2143195B1Dynamic gate drive voltage adjustment
Publication Date: 2016.01.06 TEXAS INSTR DEUTLAND GMBH
  • EP2143195B1 patent drawingFigure 1~2

AI summary

A DC-DC buck converter comprises a high-side power FET having a current path connected in series between an input terminal and an inductor connected to an output terminal supplying an output current to a load. The converter further comprises a low-side power FET having a current path connected between a reference terminal and an interconnection node of the high-side power FET with the inductor. The converter has a pulse width modulation controller receiving a feedback signal from the output terminal and providing pulse width modulated signals, and a gate driver circuit that receives the pulse width modulated signals from the pulse width modulation controller and applies pulse width modulated drive signals to the gates of the power FETs. The gate driver circuit supplies the drive signals to the gates of the power FETs at a variable voltage level adjusted in response to at least the output current, minimizing the power dissipation of the gate driver circuit.