Dynamic Gate-Off Voltage Control for Display Power Saving

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Solution Overview

Problem

Display devices face challenges in power consumption optimization, particularly in managing gate-off voltage levels based on image signal information to enhance power saving performance and extend battery life in portable devices.

Innovation Solution

A display device with a gate driver and display panel that output gate signals with varying voltage levels, where the second frame has a longer duration and lower voltage levels during blank intervals, and a signal controller generates driving control signals to adjust gate-off voltages, ensuring efficient power management by differentiating between changing and unchanging image frames.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If the vertical synchronization signal frequency is reduced to save power, then power consumption decreases, but the display may fail to properly refresh when image content changes

Engineering Contradiction:
Improvepower consumptionVSAvoidimage refresh reliability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The gate driver dynamically adjusts the gate-off voltage level based on the frame duration detected from the vertical synchronization signal. When a long-duration frame is detected (indicating no image change), the gate driver switches to a lower gate-off voltage level to reduce power consumption. When normal frame duration is detected, it uses the standard gate-off voltage level to ensure proper image refresh. This dynamic adaptation resolves the contradiction between power saving and reliable image refresh.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention changes the voltage level parameter of the gate-off signal based on operating conditions. Two different gate-off voltage levels are used: a first level for normal operation and a second (lower) level for power-saving mode. The gate voltage generator switches between these voltage levels based on frame duration detection, allowing the system to optimize power consumption without compromising display reliability when needed.

Inventive Principle:
Principle #35Parameter changes

2Use of energy by moving object

If the gate-off voltage level is lowered during blank intervals to save power, then power consumption decreases, but the voltage level must be carefully controlled to maintain signal integrity

Engineering Contradiction:
Improvepower consumptionVSAvoidvoltage level control precision
Core Design Contradiction:
Use of energy by moving objectVSManufacturing precision

Solution Approach 1:

The blank interval is segmented into multiple sub-intervals, and the gate-off voltage is applied selectively to different gate lines during different sub-intervals. The gate driver divides the blank interval into a first sub-interval and a second sub-interval, applying the lowered gate-off voltage only during the second sub-interval. This segmentation allows precise control of voltage levels, ensuring that signal integrity is maintained while achieving power savings during specific time periods.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different voltage levels are applied to different gate lines at different times based on their specific requirements. The gate driver individually controls the gate-off voltage for each gate line during the blank interval, allowing some gate lines to receive lower voltage for power saving while others maintain standard voltage levels for signal integrity. This localized control resolves the contradiction between power consumption and voltage control precision.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10176740B2Display device
Publication Date: 2019.01.08 SAMSUNG DISPLAY CO LTD
  • US10176740B2 patent drawing
  • US10176740B2 patent drawing
  • US10176740B2 patent drawing

AI summary

Provided is a display device including a gate driver configured to output a plurality of gate signals to a plurality of gate lines during each of a first frame and a second frame, and a display panel configured to display a first image during the first frame and to display a second image during the second frame, the second frame being longer in duration than the first frame, wherein each of the gate signals includes a high interval having a first voltage level and a low interval having a second voltage level lower than the first voltage level, and wherein the second voltage level of the gate signals during the second frame is lower than the second voltage level of the gate signals during the first frame.