Dynamic Gate Voltage Control for Synchronous Rectification Switches
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Solution Overview
Problem
Current switched mode power supplies (SMPS) lack the ability to dynamically adjust and maintain the gate input voltage of synchronous rectification (SR) MOSFETs, leading to inefficiencies and potential damage during low-load conditions and transitions between rectification modes.
Innovation Solution
The implementation of an output driver with dynamically controllable clamp signals and feedback loops that precisely control the voltage applied to SR transistor switches, using controller logic and out stage logic to generate driving signals based on setpoint signals, prior driving signals, and regulation signals, ensuring voltages remain within safe and efficient levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If MOSFET gate input voltage is not dynamically adjusted during light load conditions, then the SMPS structure remains simple, but energy efficiency deteriorates due to unnecessary switching and excessive power dissipation
Solution Approach 1:
The patent implements dynamic adjustment of MOSFET gate voltage through a control circuit that modifies the driving signal characteristics based on load conditions. During light load conditions, the circuit reduces gate voltage amplitude or stops switching signals, allowing the MOSFET to remain in a stable state and avoid unnecessary switching losses, thereby improving energy efficiency while adapting to varying load requirements
Solution Approach 2:
The control circuit incorporates feedback mechanisms that monitor load conditions and adjust the MOSFET gate driving signals accordingly. By detecting current draw levels and feedback signals from the power stage, the circuit dynamically modifies gate voltage to optimize efficiency across different operating conditions, resolving the contradiction between simple structure and energy efficiency
2Stability of the object's composition
If MOSFET gate input voltage is not precisely controlled during transitions between rectification modes, then the device structure remains simple, but system stability deteriorates due to sudden voltage spikes
Solution Approach 1:
The control circuit prepares for mode transitions by gradually adjusting MOSFET gate voltage before the actual transition occurs. During transitions between synchronous rectification and standard rectification modes, the circuit preemptively modifies driving signals to prevent sudden voltage spikes, ensuring smooth transitions and maintaining system stability
Solution Approach 2:
The patent employs dynamic control of gate voltage characteristics that adapts to different operating modes. The control circuit continuously adjusts driving signal parameters based on real-time operating conditions, enabling smooth transitions between rectification modes without causing voltage spikes or instability, while maintaining reasonable circuit complexity
3Productivity
If high gate input voltage is applied to SR MOSFETs with very low threshold voltages, then the MOSFET switching performance is improved, but the risk of damage to the MOSFET increases
Solution Approach 1:
The control circuit dynamically changes MOSFET gate voltage parameters based on operating conditions and MOSFET characteristics. For gallium nitride FETs with very low threshold voltages, the circuit adjusts gate voltage amplitude and timing to achieve optimal switching performance while maintaining voltages within safe operating limits, preventing damage from excessive voltage application
Solution Approach 2:
The control circuit incorporates feedback mechanisms that monitor MOSFET operating conditions and adjust gate driving signals in real-time. By detecting current draw levels, voltage conditions, and MOSFET state, the circuit prevents application of excessive gate voltages that could damage low-threshold MOSFETs while maintaining sufficient voltage for effective switching, thus protecting the device while preserving productivity
Data Source
AI summary
A switched mode power supply, in some embodiments, comprises a synchronous rectification transistor switch including a gate, and it further comprises an output driver coupled to the gate and providing a driving signal to the gate. The driving signal is determined based on a dynamically controllable clamp signal and a prior driving signal.