Dynamic GPIO Allocation via Logic-Controlled MUX/DEMUX
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Solution Overview
Problem
System on Chip (SOC) designs face challenges in efficiently managing and expanding General-Purpose Input-Output (GPIO) ports across multiple isolated subsystems, as existing multiplexing techniques are inflexible and do not dynamically allocate resources based on varying subsystem requirements.
Innovation Solution
An Integrated Circuit (IC) with a multiplexed bus and a logic circuit that includes a multiplexer/de-multiplexer (MUX/DEMUX) allows independent subsystems to communicate over multiple GPIO ports, dynamically allocating resources and configuring the MUX/DEMUX based on requests from subsystems, enabling flexible GPIO expansion and configuration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If traditional multiplexing techniques are used for GPIO ports, then the number of GPIO ports can be reduced, but the system becomes inflexible and cannot dynamically allocate resources based on varying subsystem requirements
Solution Approach 1:
The patent implements dynamic allocation of GPIO ports through a logic circuit that can reconfigure the multiplexer/demultiplexer based on real-time subsystem requests. Each subsystem can request GPIO ports as needed, and the logic circuit dynamically assigns available ports, transforming the static multiplexing arrangement into a dynamic resource allocation system that adapts to varying requirements.
Solution Approach 2:
The system incorporates feedback mechanisms where subsystems send requests to the logic circuit indicating their GPIO needs. The logic circuit receives this feedback, processes the requests against available resources, and reconfigures the MUX/DEMUX accordingly. This closed-loop feedback system enables flexible adaptation while maintaining manageable complexity through automated decision-making.
2Productivity
If multiple independent subsystems are integrated in the same ASIC, then resource sharing is improved, but conflicts arise when multiple subsystems require GPIO ports simultaneously
Solution Approach 1:
The logic circuit serves as an intermediary between multiple independent subsystems and the shared GPIO resources. It receives requests from various subsystems, manages the allocation of available GPIO ports, and ensures that each subsystem receives the resources it needs without conflicts. This mediator approach enables efficient resource sharing while maintaining the reliability and independence of each subsystem.
Solution Approach 2:
The multiplexer/demultiplexer structure provides universal access to GPIO ports for multiple subsystems. The same physical GPIO ports can be dynamically assigned to different subsystems based on current needs, allowing one set of hardware resources to serve multiple functions and multiple subsystems reliably without requiring dedicated ports for each.
3Quantity of substance
If GPIO ports are multiplexed on the SOC pads, then the number of external connections is reduced, but the ability to support varying GPIO requirements across different configurations is limited
Solution Approach 1:
The patent transforms the static multiplexed GPIO configuration into a dynamic system where the logic circuit can reassign GPIO ports on-the-fly based on which subsystem needs them. This dynamic reconfiguration capability allows the same physical pads to support varying GPIO requirements across different system configurations without requiring additional external connections.
Solution Approach 2:
The system adds a temporal and logical dimension to the physical GPIO connections. While the physical number of pads remains fixed, the logical assignment of GPIO ports changes over time based on subsystem requests. This dimensional transformation allows a fixed physical interface to support variable logical configurations, achieving adaptability without increasing external connection count.
Data Source
AI summary
An Integrated Circuit (IC) includes two or more subsystem circuits, a multiplexed bus, a multiplexer/de-multiplexer (MUX/DEMUX) and a logic circuit. The subsystems are independent of one another and are configured to communicate data over multiple General-Purpose Input-Output (GPIO) ports. The multiplexed bus is configured to communicate with circuitry external to the IC. The MUX/DEMUX is configured to translate between the data communicated by the subsystem circuits over the multiple GPIO ports and the multiplexed bus. The logic circuit is independent of the subsystem circuits and is configured to allocate resources of the MUX/DEMUX among the subsystem circuits in response to requests received from the subsystem circuits, and to configure the MUX/DEMUX to provide the allocated resources to the subsystem circuits.