Dynamic GPIO Control for Microcontroller Interference
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Microcontroller systems face errors due to interference between multiple units sharing general purpose input/output (GPIO) pins and are either prone to malicious code or require costly and complex dedicated GPIOs, with asynchronous bridges complicating time synchronization and synchronous bridges necessitating identical operating frequencies.
Innovation Solution
A microcontroller system where a master microcontroller unit dynamically controls GPIO states to prevent conflicts, eliminating the need for asynchronous bridges and allowing dynamic assignment of GPIOs to slave units, reducing the number of exposed components and enhancing security by isolating critical components from potential threats.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple microcontroller units share general purpose input/output pins via multiplexers and bridges, then the number of GPIO pins can be reduced, but errors occur due to interference between multiple units and malicious code
Solution Approach 1:
The patent segments the GPIO control authority by introducing a master microcontroller unit that dynamically assigns control of individual GPIO pins to slave microcontroller units. This segmentation isolates each slave unit's access to specific GPIOs, preventing interference and malicious code propagation while maintaining shared GPIO functionality.
Solution Approach 2:
The master microcontroller unit acts as an intermediary between slave microcontroller units and shared GPIO pins. It receives control requests from slave units, validates them, and dynamically grants or denies access to specific GPIOs, thereby preventing direct interference while enabling shared access when authorized.
2Reliability
If dedicated general purpose input/output pins are assigned to each microcontroller unit, then interference and malicious code risks are reduced, but the system becomes expensive and complicated
Solution Approach 1:
The patent makes the master microcontroller unit universal by giving it the capability to dynamically assign and reassign control of multiple GPIO pins to different slave units based on operational needs. This multi-functionality allows a single master unit to manage GPIO resources for the entire system, reducing the need for dedicated GPIOs per slave unit while maintaining isolation benefits.
Solution Approach 2:
The system implements dynamic GPIO assignment where the master microcontroller unit can change which slave unit controls which GPIO pin at runtime. This dynamic control allows the system to adapt GPIO allocation to current operational requirements, reducing the total number of GPIO pins needed compared to static dedicated assignments while maintaining reliability through controlled access.
3Reliability
If synchronous bridges are used to connect microcontroller units, then frequency synchronization is achieved, but all components must operate at the same frequency which limits flexibility
Solution Approach 1:
The patent extracts the frequency synchronization requirement from the communication interface by using an asynchronous communication bus between the master and slave microcontroller units. This extraction allows slave units to operate at their own optimal frequencies while the master unit manages GPIO control through asynchronous messages, eliminating the need for synchronous frequency matching.
4Adaptability or versatility
If asynchronous bridges are used to connect microcontroller units, then different operating frequencies are allowed, but time synchronization becomes complicated
Solution Approach 1:
The master microcontroller unit serves as an intermediary that handles time synchronization centrally. Slave units communicate their timing requirements to the master through the asynchronous bus, and the master coordinates GPIO control actions with proper timing, eliminating the need for complex distributed time synchronization mechanisms while preserving asynchronous frequency flexibility.
Data Source
Figure 1
Figure 2
Figure 3
AI summary
A microcontroller system (100) comprising a master microcontroller unit (102), a further module (104, 106) and a general purpose input/output (108). In a first state the general purpose input/output is controlled by the master microcontroller unit and in a second state the general purpose input/output is controlled by the further module. The master microcontroller unit is arranged to transmit a selection signal which changes the state of the general purpose input/output.