Dynamic Hardware Controllers for Memory Bandwidth Allocation

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Solution Overview

Problem

Multicore processors face challenges in providing predictable quality of service due to contention for shared resources like caches and memory bandwidth, leading to degraded performance and unpredictable behavior among applications.

Innovation Solution

Implementing dynamic hardware controllers within processor cores to monitor and manage memory bandwidth allocation dynamically, using techniques such as rate limiters and leaky bucket counters to throttle access based on real-time demand, ensuring efficient sharing of resources and reducing 'noisy neighbor' issues.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If dynamic hardware controllers with rate limiters and leaky bucket counters are implemented to throttle memory bandwidth access, then quality of service predictability and resource allocation control are improved, but device complexity increases

Engineering Contradiction:
Improvequality of service predictabilityVSAvoidhardware controller complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces dynamic hardware controllers as intermediary components between processor cores and shared memory resources. These controllers include rate limiters and leaky bucket counters that mediate memory bandwidth allocation, enforcing quotas and throttling access rates. This intermediary layer provides fine-grained control over resource allocation while maintaining quality of service predictability, resolving the contradiction between control precision and system complexity through specialized hardware mediation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent implements dynamic adjustment of memory bandwidth allocation parameters through hardware controllers that can modify access rates, quotas, and throttling thresholds in real-time. The rate limiters and leaky bucket counters continuously adjust operational parameters based on current system state and application priorities, enabling adaptive resource allocation that maintains quality of service predictability while managing complexity through parameterized control mechanisms.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If fine-grained control of resource allocation is implemented through dynamic hardware controllers, then application performance and throughput are improved, but ease of operation deteriorates due to increased configuration and management overhead

Engineering Contradiction:
Improveapplication throughputVSAvoidresource allocation management
Core Design Contradiction:
ProductivityVSEase of operation

Solution Approach 1:

The patent implements self-service mechanisms where the dynamic hardware controllers automatically monitor resource usage patterns, detect contention conditions, and adjust memory bandwidth allocation without external intervention. The rate limiters and leaky bucket counters autonomously enforce quotas and throttle access based on real-time measurements, enabling the system to self-optimize application throughput while reducing the operational burden on system administrators through automated resource management.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent incorporates feedback loops where the dynamic hardware controllers continuously monitor memory bandwidth usage, application performance metrics, and resource allocation effectiveness. This feedback information is used to dynamically adjust rate limiter thresholds, leaky bucket parameters, and quota allocations, creating a closed-loop control system that automatically optimizes application throughput while simplifying operation through adaptive, data-driven resource management.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20230325241A1Hardware and configuration support for allocating shared resources
Publication Date: 2023.10.12 INTEL CORP
  • US20230325241A1 patent drawing
  • US20230325241A1 patent drawing
  • US20230325241A1 patent drawing

AI summary

Embodiments for allocating shared resources are disclosed. In an embodiment, an apparatus includes a core and a hardware rate selector. The hardware rate selector is to, in response to a first indication that demand for memory bandwidth from the core has reached a threshold value, determine a delay value to be used to limit allocation of memory bandwidth to the core. The hardware rate selector includes a controller having a first counter to count a second indication of demand for memory bandwidth from the first core and a second counter to count expirations of time windows. The first indication is based on a difference between the first counter value and the second counter value.