Dynamic Home Tile Mapping for Microprocessor Directory Latency
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Solution Overview
Problem
Current directory-based coherence mechanisms in microprocessors face bottlenecks due to random placement of directory information, leading to increased latency and energy consumption as the number of cores scales, as they do not effectively leverage locality in directory accesses.
Innovation Solution
Implement dynamic home tile mapping, allowing for the dynamic reconfiguration and migration of directory information to improve locality, using a cache controller with a home-tile lookaside buffer (HLB) that computes and maintains improved home tile locations for data, enabling efficient core-to-core communication.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If directory information is placed randomly using hash functions, then worst-case behaviors are avoided, but locality with respect to consecutive directory accesses is not leveraged, leading to increased latency and energy consumption
Solution Approach 1:
The patent implements dynamic home tile mapping that allows the mapping between directory addresses and home tiles to change over time based on access patterns. The system monitors consecutive directory accesses and dynamically remaps directory entries to home tiles that are physically closer in the interconnect network, thereby reducing access latency while maintaining the randomness benefits.
Solution Approach 2:
The system employs feedback mechanisms by monitoring directory access patterns and using this information to make intelligent remapping decisions. The home tile mapping is adjusted based on observed access locality, creating a closed-loop system that continuously optimizes for reduced latency and energy consumption while avoiding worst-case scenarios.
2Productivity
If the number of cores on a die is scaled up, then processing power is increased, but the distance between cores and directory slices increases, leading to higher energy dissipation in the on-chip interconnect
Solution Approach 1:
The patent applies local quality by making the home tile mapping adaptive to local access patterns. Instead of using a fixed global mapping, the system identifies locally accessed directory entries and remaps them to nearby home tiles in the interconnect network, thereby reducing the average distance that coherence messages must travel and lowering energy dissipation.
Solution Approach 2:
The system introduces an additional dimension of optimization by considering the physical spatial arrangement of home tiles in the interconnect network alongside the logical directory structure. This spatial awareness allows the system to route coherence messages through shorter physical paths, reducing energy consumption as the number of cores scales.
3Device complexity
If static home tile mapping is used, then implementation is simpler, but it does not leverage locality in directory accesses, resulting in suboptimal performance
Solution Approach 1:
The system performs preliminary actions by pre-computing and caching the optimal home tile mappings based on observed access patterns. Instead of making complex remapping decisions in real-time during each directory access, the system proactively identifies access patterns and prepares optimized mappings in advance, reducing the performance impact of the dynamic mapping mechanism.
Data Source
AI summary
Technologies for migration of dynamic home tile mapping are described. An apparatus includes means for receiving coherence messages from other processor cores on the die, means for recording locations from which the coherence messages originate and means for determining distances between the requested home tiles and the locations from which the coherence messages originate. The apparatus includes means for determining whether an average distance between a particular home tile, whose identifier is stored in the home tile table, exceeds a threshold. When the average distance exceeds the defined threshold, the apparatus includes means for migrating the particular home tile to another location.