Dynamic Hysteresis Comparator for Noise-Stable Threshold Switching
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Solution Overview
Problem
Existing comparator circuits face instability due to noise-induced multiple transitions, particularly in applications like buck DC-to-DC converters, where small changes in input signals require precise threshold voltage management to prevent switching between synchronous and sleep modes without adequate hysteresis.
Innovation Solution
A dynamic hysteresis circuit is introduced, comprising a timer circuit and a hysteresis circuit connected to the comparator's output, which detects state changes and prevents further transitions for a fixed time period by diverting current through the differential amplifier, thus stabilizing the output voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If hysteresis is added to the comparator to prevent multiple transitions, then stability is improved, but device complexity increases
Solution Approach 1:
The patent combines the hysteresis function and timing function into a single integrated circuit block. The timer circuit and hysteresis circuit share common components and signaling paths, merging multiple functions into one unified structure that prevents multiple transitions while maintaining reasonable complexity
Solution Approach 2:
The integrated circuit performs multiple functions simultaneously: it detects comparator output transitions, generates timing delays, and applies hysteresis feedback. This multi-functional design consolidates what would traditionally require separate circuits into a single universal block
2Reliability
If a fixed time period delay is implemented to prevent rapid state changes, then reliability is improved, but loss of time increases
Solution Approach 1:
The patent implements dynamic hysteresis where the threshold voltage changes based on the timing circuit state. The hysteresis effect is activated only during the fixed time period after a transition, creating a dynamic rather than static response that adapts to the timing requirements of the application
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively prevents unwanted state changes in the comparator output, enhancing stability and reducing noise-induced instability in comparator circuits, particularly in low-quiescent current conditions like sleep modes in buck DC-to-DC converters.
Implementation Method 1
A positive plate of a first capacitor is connected to a junction of the source terminal of the first transistor and the first terminal of the first current source
Implementation Method 2
Hysteresis introduces two separate threshold voltage levels to the comparator COMP1
Implementation Method 3
a comparator circuit is a device that compares two input signals (either voltage or current) and provides an output digital signal that indicates which of the input signals is larger
Data Source
AI summary
A dynamic hysteresis comparator has a threshold voltage level with dynamic hysteresis for sensing small changes in differential input signals at the input, while controlling a duration that an output voltage state will remain fixed for preventing the output of the comparator from changing state in an unstable fashion or “chattering”. The comparator has a dynamic hysteresis circuit connected to an output of a trigger circuit of the comparator that detects when a decision is made that a first input of the comparator is greater than or lesser than a second input of the comparator causing an output of the comparator to change state. Once the decision causing the change of state of the output is detected, any decisions determining that second input is now lesser than or greater than the first input are prevented from causing the output of the comparator from changing state for a fixed time period.