Dynamic Interface Queue Switching for Processor Cores

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Solution Overview

Problem

Existing packet processing systems face inefficiencies due to constant core resource utilization, as worker cores poll queues at a fixed rate regardless of traffic rates, leading to suboptimal processor utilization and power wastage, as frequency changes impact all queues equally without considering individual traffic rates.

Innovation Solution

Implement a dynamic assignment of interface queues to cores running at different frequencies, adjusting polling rates based on traffic rates by assigning high volume queues to high frequency cores and low volume queues to low frequency cores, using a monitor to reassess and adjust core frequencies and queue assignments in real-time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If worker cores poll queues at a constant rate, then packet processing performance is maintained, but processor resource utilization becomes inefficient and power consumption increases

Engineering Contradiction:
Improvepacket processing performanceVSAvoidprocessor resource utilization
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies dynamics by making the polling rate adjustable rather than fixed. The system dynamically changes the polling rate based on actual traffic conditions, transitioning from static constant-rate polling to dynamic variable-rate polling that adapts to network load variations.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the polling rate parameter based on traffic conditions. By monitoring traffic rates and adjusting the polling rate accordingly, the system optimizes processor utilization while maintaining packet processing performance, resolving the contradiction between reliability and energy efficiency.

Inventive Principle:
Principle #35Parameter changes

2Use of energy by stationary object

If processor frequency is changed to save power, then power consumption is reduced, but the polling rate of all queues accessed by the processor is impacted uniformly without considering individual traffic rates

Engineering Contradiction:
Improvepower consumptionVSAvoidqueue-specific traffic rate adaptation
Core Design Contradiction:
Use of energy by stationary objectVSAdaptability or versatility

Solution Approach 1:

The patent segments the polling mechanism by allowing each queue to have its own polling rate independent of other queues. This segmentation enables individual queue optimization based on their specific traffic rates rather than applying a uniform frequency change to all queues.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by customizing the polling rate for each queue according to its individual traffic characteristics. High-traffic queues receive higher polling rates while low-traffic queues use lower rates, optimizing power consumption without sacrificing performance for any single queue.

Inventive Principle:
Principle #3Local quality

3Productivity

If the number of worker cores is increased to handle maximum predicted throughput, then packet processing capacity is sufficient, but resource utilization becomes suboptimal when actual traffic rates are lower

Engineering Contradiction:
Improvepacket processing capacityVSAvoidprocessor core utilization
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent makes the polling rate dynamic and adaptive to actual traffic conditions. When traffic rates are lower than maximum predicted throughput, the system automatically reduces polling rates to match actual demand, optimizing resource utilization across the worker cores.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system implements feedback by monitoring actual traffic rates and using this information to adjust polling rates accordingly. This closed-loop control ensures that processor resources are allocated efficiently based on real-time traffic conditions rather than relying solely on maximum predicted capacity.

Inventive Principle:
Principle #23Feedback

Data Source

PatentEP3640797B1Dynamic traffic-aware interface queue switching among processor cores
Publication Date: 2024.12.04 INTEL CORP
  • EP3640797B1 patent drawingFigure 1
  • EP3640797B1 patent drawingFigure 2
  • EP3640797B1 patent drawingFigure 3

AI summary

Examples include techniques for monitoring a data packet transfer rate at an interface queue, and based at least in part on a comparison of the data packet transfer rate to a threshold, assigning the interface queue from a core of a first class to a core of a second class or assigning the interface queue from a core of the second class to a core of the first class.