Dynamic IR Drop Analysis via Simultaneous Switching Scheduling
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Solution Overview
Problem
Conventional dynamic IR drop analysis tools provide inaccurate assessments due to a lack of understanding and failure to account for the impact of simultaneous switching on dynamic power in integrated circuits (ICs).
Innovation Solution
A method involving computer hardware to generate bias information for a circuit design, specifying switching information for standard cells, and performing a dynamic voltage analysis by switching the cells based on a generated schedule, which increases the likelihood of simultaneous switching of high-risk instances.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional dynamic IR drop analysis tools are used, then analysis can be performed, but the assessment accuracy is poor due to lack of understanding and failure to account for simultaneous switching impact
Solution Approach 1:
The system performs preliminary actions by calculating risk measures for each standard cell instance and generating a scheduled switching sequence before actual analysis. This preliminary scheduling ensures that high-risk instances are switched simultaneously to accurately reproduce worst-case IR drop scenarios, thereby improving measurement precision and reliability.
Solution Approach 2:
The invention changes the switching parameters of standard cell instances dynamically based on calculated risk measures. By adjusting switching timing and probability parameters according to risk assessment, the system accurately models simultaneous switching effects that conventional tools miss, resolving the contradiction between analysis capability and accuracy.
2Reliability
If conventional analysis tools are used without simultaneous switching consideration, then analysis process is simple, but the test coverage is insufficient and IR drop violations are not detected
Solution Approach 1:
The system performs preliminary risk calculation and scheduling actions to identify high-risk instances before analysis. This preliminary preparation enables comprehensive test coverage of critical paths without requiring complex real-time analysis during execution, thus improving reliability while managing complexity through structured preparation.
Solution Approach 2:
The invention segments the analysis process into distinct phases: risk calculation, instance ranking, scheduling generation, and analysis execution. This segmentation allows each phase to be optimized independently, improving test coverage of critical switching scenarios while maintaining manageable process complexity through modular organization.
3Measurement precision
If simultaneous switching of high-risk instances is implemented, then dynamic IR drop analysis accuracy improves, but the computational resources and time required increase
Solution Approach 1:
The system applies local quality by focusing computational resources only on high-risk standard cell instances that have been identified through preliminary risk assessment. Instead of analyzing all instances uniformly, the system concentrates on specific critical instances, improving measurement precision for worst-case scenarios while reducing overall analysis time compared to exhaustive analysis.
Solution Approach 2:
The invention performs preliminary risk calculation and scheduling before actual analysis execution. This preliminary action filters and prioritizes instances that need simultaneous switching analysis, allowing the system to achieve high measurement precision for critical paths while minimizing unnecessary computational time by pre-identifying what requires detailed analysis.
Data Source
AI summary
Dynamic voltage drop analysis for a circuit design includes generating, by computer hardware, bias information for a circuit design. The bias information specifies switching information for a plurality of instances of one or more standard cells of the circuit design. A schedule specifying switching for the plurality of instances of the circuit design is generated by the computer hardware based on the bias information. A dynamic voltage analysis is performed by the computer hardware on the circuit design to generate dynamic voltage analysis results by switching the plurality of instances of the circuit design based on the schedule.