Dynamic Layer Polygon Generation for Semiconductor Defect Detection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As semiconductor device design rules shrink, detecting and correcting defects becomes increasingly challenging due to the growing number of potentially yield-relevant and nuisance defects, with existing inspection processes struggling to determine which defects affect electrical parameters and yield, leading to difficulties in process control.
Innovation Solution
A method and system for storing dynamic layer content in a design file using geometric operation formulas such as OR, AND, GROW, and SHRINK operations, which generates and updates polygons based on process layers to improve defect detection and process control by enhancing the sensitivity and accuracy of inspections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If inspection sensitivity is increased to detect smaller defects, then defect detection capability is improved, but the number of nuisance defects detected increases dramatically
Solution Approach 1:
The patent segments defects into two categories: yield-relevant defects and nuisance defects. By classifying defects based on their impact on electrical parameters and yield, the system can focus inspection resources on critical defects while filtering out non-critical ones, thus resolving the contradiction between detecting all defects and managing the volume of detected defects.
Solution Approach 2:
The patent applies different inspection strategies to different locations on the wafer by determining the position of defects with respect to the electrical design. Yield-relevant defects are identified based on their spatial relationship to critical circuit features, allowing localized quality control that addresses the contradiction by treating different defect locations differently.
2Productivity
If design rules are shrunk to improve device density, then productivity is improved, but manufacturing precision becomes more difficult to maintain
Solution Approach 1:
The patent replaces traditional mechanical inspection methods with a computational approach that uses defect position data and electrical design information to identify yield-relevant defects. This substitution enables precise defect classification even at shrunk design rules, maintaining manufacturing precision while supporting higher device density.
Solution Approach 2:
The patent changes the inspection parameter from simply detecting defect presence to evaluating defect position relative to electrical design features. This parameter transformation allows the system to maintain manufacturing precision at smaller design rules by focusing on the spatial relationship between defects and critical circuit elements rather than relying solely on defect size.
3Reliability
If all detected defects are corrected to eliminate defects, then reliability is improved, but manufacturing cost and complexity increase significantly
Solution Approach 1:
The patent extracts only the yield-relevant defects from the total population of detected defects by analyzing their position relative to electrical design features. This extraction process eliminates the need to correct all defects, reducing process control complexity while maintaining reliability by focusing corrections only on defects that actually impact yield.
Solution Approach 2:
The patent applies partial action by correcting only the subset of defects that are determined to be yield-relevant, rather than correcting all detected defects. This selective approach reduces manufacturing complexity and cost while maintaining sufficient reliability, as it addresses only the critical portion of the defect population.
Data Source
AI summary
Systems and methods are disclosed for storing dynamic layer content in a design file. A design file is received having design data corresponding to a plurality of process layers. A geometric operation formula is also received. A processor generates a polygon having dynamic layer content that is formed by applying the geometric operation formula on two or more of the plurality of process layers. The updated design file is stored, the design file now having a polygon having dynamic layer content.