Dynamic Level-Conversion Circuits for Faster Voltage-Domain Signaling
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Solution Overview
Problem
Conventional level conversion mechanisms in electronic interfaces and charge recycling fabrics are constrained by the gate-to-source voltage of pull-down and pull-up transistors, limiting the operational frequency range and efficiency of signal propagation between different voltage domains.
Innovation Solution
The use of PMOS and NMOS devices as pull-down and pull-up transistors, respectively, with dynamic gate voltages controlled by inverters, increases the effective gate-to-source voltage, enabling faster level conversion by adjusting the supply voltage differential between the power and ground terminals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional NMOS pull-down or PMOS pull-up transistors are used for level conversion, then the circuit structure is simple, but the level conversion speed is constrained by the gate-to-source voltage with respect to the magnitude of the lower supply voltage
Solution Approach 1:
The patent employs dynamic supply voltages that change over time to control the pull-down and pull-up transistors. The first supply voltage to the pull-down transistor and the second supply voltage to the pull-up transistor are dynamically adjusted during operation, enabling the transistors to operate with higher effective gate-to-source voltages and achieve faster level conversion speeds while maintaining a relatively simple circuit structure.
Solution Approach 2:
The patent changes the supply voltage parameters dynamically during circuit operation. By varying the first supply voltage and second supply voltage over time, the effective gate-to-source voltage of the transistors is increased, which directly improves the level conversion speed without requiring a fundamentally more complex circuit architecture.
2Productivity
If conventional level conversion mechanisms are used, then the circuit implementation is straightforward, but the operational frequency range is limited
Solution Approach 1:
The dynamic supply voltage approach enables the circuit to operate at higher frequencies by allowing the transistors to switch more rapidly. The time-varying supply voltages create stronger drive conditions that reduce the switching time, thereby expanding the operational frequency range while keeping the basic level conversion mechanism relatively simple.
Solution Approach 2:
By dynamically changing the supply voltage parameters, the circuit achieves faster switching speeds and extended operational frequency range. The variable supply voltages provide the necessary drive strength for high-frequency operation without requiring a complete redesign of the level conversion mechanism.
3Speed
If the supply voltage differential is increased to improve level conversion speed, then the conversion speed increases, but the power consumption increases
Solution Approach 1:
The patent uses periodic or time-varying supply voltages that are applied in a controlled manner. By dynamically adjusting the supply voltages in a periodic fashion rather than maintaining a constantly high voltage differential, the circuit achieves fast level conversion during critical switching periods while reducing average power consumption during non-critical periods.
Solution Approach 2:
The dynamic supply voltage approach allows the circuit to apply high voltage differentials only when needed for fast switching, and reduce the voltage differentials during other periods. This temporal differentiation enables the circuit to achieve high conversion speeds when required while minimizing overall power consumption.
Data Source
AI summary
A level-shifting circuits utilizing storage cells for shifting signals low-to-high or high-to-low include control drivers with moving supply voltages. The moving supply voltages may power positive or negative supply terminals of the control drivers. The control drivers drive gates of common-source configured devices coupled to storage nodes of the storage cell.