Dynamic Level Shifter Circuit for Fast Low-Power Memory I/O
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Solution Overview
Problem
Conventional level shifters in memory systems face challenges in achieving reduced power consumption and increased speed while maintaining a compact design, as they often require significant real estate and I/O delay, especially when used in large-scale memory applications.
Innovation Solution
The proposed level shifter design incorporates dynamic charging devices that provide parallel charging current during signal transitions, enhancing the speed and reducing power consumption by utilizing a configuration of pull-down, switching, and charging circuitry operating across different voltage domains, which includes current limiting and dynamic devices to manage current flow effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If conventional level shifters are used in memory systems, then signal level conversion is achieved, but power consumption is high and I/O delay is increased
Solution Approach 1:
The level shifter employs dynamic charging devices that are activated only during signal transitions rather than continuously operating static charging devices. This dynamic operation reduces power consumption while maintaining fast charging during transitions, thereby resolving the contradiction between low power consumption and fast speed.
Solution Approach 2:
The charging current is applied periodically during signal transitions rather than continuously. The dynamic charging devices provide charging current only when needed (during transitions), reducing overall power consumption while ensuring fast charging when required, thus improving both power efficiency and speed performance.
2Area of stationary object
If conventional level shifters are used in memory systems, then signal level conversion is achieved, but real estate area is significant
Solution Approach 1:
The level shifter is divided into distinct functional blocks: dynamic charging devices, current limiting devices, pull-down devices, and cross-coupled devices. This segmentation allows each component to be optimized independently for area efficiency while maintaining overall robustness through the coordinated operation of all blocks across different technology corners.
Solution Approach 2:
The design incorporates devices with different threshold voltages and sizing parameters to optimize performance across technology process corners. By carefully selecting and combining devices with varying parameters, the level shifter achieves compact area while maintaining robust operation under different process, voltage, and temperature conditions.
3Speed
If dynamic charging devices are added to provide parallel charging current, then charging speed is improved, but device complexity increases
Solution Approach 1:
The dynamic charging devices are merged with the existing pull-down and cross-coupled device structures. The charging, pull-down, and latching functions are combined in an integrated circuit architecture where devices serve multiple purposes, reducing overall complexity despite adding dynamic charging capability.
Solution Approach 2:
The cross-coupled devices serve multiple functions: they act as latching elements, current sources for dynamic charging, and part of the pull-down network. This multi-functionality reduces the need for separate dedicated components, thereby limiting the increase in device complexity while achieving fast parallel charging.
Data Source
AI summary
Level shifters, memory systems, and level shifting methods are described. According to one arrangement, a level shifter includes an input configured to receive an input signal in a first voltage domain, an output configured to output an output signal from the level shifter in a second voltage domain different than the first voltage domain, a plurality of pull-down devices, and wherein one of the pull-down devices is coupled with the input and the output, a plurality of cross-coupled devices coupled with the pull-down devices and configured to provide transitions in the output signal as a result of transitions in the input signal, a plurality of current limiting devices coupled with the cross-coupled devices and configured to limit a flow of current from a source to the cross-coupled devices, and a plurality of dynamic devices configured to selectively provide charging current from the source to the cross-coupled devices.