Dynamic Library Interface for On-Demand FPGA Acceleration
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Solution Overview
Problem
Existing methods for leveraging programmable logic circuits like FPGAs for hardware acceleration require significant modifications to client applications and lack transparency and flexibility in resource management, limiting their widespread adoption for accelerating software tasks.
Innovation Solution
The method involves the operating system managing reconfigurable hardware resources, allowing software applications to dynamically link and invoke shared libraries that configure and drive programmable logic circuits transparently, similar to regular API calls, enabling on-demand allocation and release of hardware resources without modifying the client application.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If programmable logic circuits are used for hardware acceleration, then execution speed and energy efficiency are improved, but application complexity and modification requirements increase
Solution Approach 1:
The patent introduces shared libraries as an intermediary layer between applications and programmable logic circuits. These libraries provide standardized interfaces that applications can call without needing to understand or modify their code, while the libraries handle the complex tasks of configuring and managing the hardware acceleration resources. This mediator approach allows applications to benefit from hardware acceleration without direct complexity.
Solution Approach 2:
The shared libraries are designed to be universal interfaces that can serve multiple applications and multiple types of programmable logic circuits. Rather than requiring each application to be custom-modified for hardware acceleration, the libraries provide a common, standardized interface that works across different applications and hardware configurations, making the system multi-functional and broadly applicable.
2Adaptability or versatility
If programmable logic circuits are dynamically allocated, then resource utilization is improved, but management complexity increases
Solution Approach 1:
The system implements self-service mechanisms where the shared libraries automatically manage the allocation, configuration, and release of programmable logic circuit resources. When an application calls a library function, the library automatically determines whether hardware acceleration is available, configures the appropriate circuit, and manages its lifecycle without requiring external intervention or complex management protocols.
Solution Approach 2:
The patent merges the management of hardware resources with the software library interface. Rather than having separate hardware management systems and application interfaces, the shared libraries combine both functions into a unified mechanism that handles both software-level application calls and hardware-level resource management through the same interface layer.
3Ease of operation
If shared libraries are used to wrap hardware functions, then ease of use is improved, but transparency and knowledge requirements worsen
Solution Approach 1:
The shared libraries act as an intermediary that intentionally obscures hardware complexity from applications. The libraries provide a simplified, standardized interface that applications can use without needing to understand the underlying hardware architecture, configuration protocols, or resource management mechanisms. This information filtering is intentional and beneficial, allowing applications to focus on their core functionality while the libraries handle hardware complexity.
Data Source
AI summary
A method for managing a programmable logic circuit by invoking a dynamic library function. The method includes invoking an application programming interface (API) function by an application from a shared object; dynamically loading the library in memory and linked on demand; associating the library to a logic circuit configuration file describing logic connections within a programmable logic device (PLD); transmitting and loading the configuration file into the PLD to map the logic circuit configurations; writing, through the dynamic library, input data values as a circuit entry and clock signal for driving the logical execution of the function mapped in hardware; collecting through the dynamic library the output data values resulting of logic circuits execution by reading output of the logic circuit; converting through the dynamic library, the logic circuit output to the expected data type specified by the API function; and returning the data result to a calling application.


