Dynamic Logic Keeper Current Control for Leakage and Switching

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Solution Overview

Problem

Dynamic logic circuits face significant current leakage issues due to advancements in semiconductor technology, leading to increased sensitivity and degradation in performance, necessitating larger keeper devices that can interfere with switching speed and overall circuit performance.

Innovation Solution

A current control mechanism is introduced, where a current source device is coupled between the power network and the keeper device, regulated by a gate control voltage signal generated based on the logic evaluation node rail voltage and a reference voltage, optimizing keeper strength based on leakage, temperature, and power supply voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If larger keeper devices are used to compensate for increased leakage current in leading-edge technologies, then leakage compensation is improved, but switching speed and circuit performance are degraded

Engineering Contradiction:
Improveleakage compensationVSAvoidswitching speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent applies dynamics by making the keeper device strength adjustable rather than fixed. A control mechanism dynamically regulates the keeper current based on operating conditions (leakage current magnitude, temperature, power supply voltage) to provide just enough compensation without excessive current that would slow switching. This resolves the contradiction by adapting the keeper strength to actual needs rather than using a consistently large keeper device.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of keeper current magnitude from a fixed large value to a dynamically adjusted value. By monitoring leakage current and other parameters (temperature, power supply voltage), the system adjusts the keeper device's current output to match actual leakage compensation needs, thereby maintaining reliability while minimizing impact on switching speed.

Inventive Principle:
Principle #35Parameter changes

2Stability of the object's composition

If keeper device strength is increased to prevent node discharge, then node stability is improved, but interference with normal switching increases

Engineering Contradiction:
Improvenode stabilityVSAvoidswitching interference
Core Design Contradiction:
Stability of the object's compositionVSObject-generated harmful factors

Solution Approach 1:

The patent implements feedback by continuously monitoring the logic evaluation node's voltage state and leakage current, then using this information to adjust the keeper device's current output. The control mechanism compares the actual node state with desired state and modifies keeper strength accordingly, providing stable node voltage without excessive current that would interfere with switching operations.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The keeper control mechanism serves itself by automatically adjusting its own output current based on sensed conditions. The system monitors its own effectiveness in preventing node discharge and self-regulates the keeper current to provide optimal stability while minimizing switching interference, without requiring external intervention.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS7573300B2Current control mechanism for dynamic logic keeper circuits in an integrated circuit and method of regulating same
Publication Date: 2009.08.11 MARVELL ASIA PTE LTD
  • US7573300B2 patent drawing
  • US7573300B2 patent drawing
  • US7573300B2 patent drawing

AI summary

An integrated circuit that includes a gate control voltage generator that supplies a current control gate voltage to a plurality of current control devices of a corresponding plurality of dynamic logic circuits each having a keeper circuit. The gate control voltage generator provides, via current control gate voltage, global control of the amount of keeper current flowing through the keeper circuits so as to enhance the performance of the dynamic logic circuits.