Dynamic Low Power Mode Selection for Computing Devices

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Solution Overview

Problem

Current methods for configuring low power modes in computing devices are static and unable to dynamically adapt to real-time operating conditions, leading to sub-optimal power savings and increased complexity as devices become more sophisticated, with predefined configurations failing to consider current conditions, latency requirements, and dependencies.

Innovation Solution

A processor-driven approach that dynamically selects a combination of low power resource modes based on current operating conditions, expected idle time, and latency requirements, using statistical information and a solver process to optimize power savings while ensuring system reliability, by evaluating and re-computing lookup tables and updating data tables based on device usage patterns and environmental factors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If static predefined low power configurations are used, then device complexity is reduced, but power savings are sub-optimal and cannot adapt to real-time conditions

Engineering Contradiction:
Improvepower savingsVSAvoidconfiguration complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent implements dynamic low power mode selection where the processor continuously monitors operating conditions (temperature, workload, battery charge) and automatically selects optimal power modes for different device components. This transforms static predefined configurations into dynamic adaptive configurations that respond to real-time conditions, maximizing power savings without requiring complex manual configuration.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system enables self-service through automated power mode management where the processor independently evaluates operating conditions and selects appropriate low power modes without user intervention. The processor monitors its own state and device conditions, then autonomously configures power modes to optimize energy consumption while maintaining performance requirements.

Inventive Principle:
Principle #25Self-service

2Adaptability or versatility

If dynamic low power mode selection is implemented, then power savings are optimized for current conditions, but system complexity increases due to real-time evaluation requirements

Engineering Contradiction:
Improveadaptability to operating conditionsVSAvoidsystem complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by pre-defining multiple low power modes for each device component with specific characteristics (power consumption levels, latency properties, functional capabilities). These pre-configured modes are stored in a database structure, allowing the processor to quickly select from known good configurations based on current conditions without performing complex real-time optimization calculations, thus reducing runtime computational complexity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary power management database that stores pre-evaluated low power mode configurations. This database acts as a mediator between the processor's operating conditions and the available power modes, allowing the system to adapt dynamically without requiring complex real-time evaluation algorithms. The database pre-computes and stores optimal mode selections for various condition scenarios.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Use of energy by moving object

If multiple low power modes are evaluated for each resource, then optimal power savings are achieved, but latency requirements may be exceeded

Engineering Contradiction:
Improvepower consumptionVSAvoidlatency
Core Design Contradiction:
Use of energy by moving objectVSLoss of time

Solution Approach 1:

The patent applies local quality by associating specific properties (power consumption, latency, functionality) with each low power mode of each device component. Instead of applying a single global power mode to the entire system, the processor can independently select different power modes for different components (display, processor, memory, communication modules) based on their individual latency requirements and power savings potential. This allows components with strict latency requirements to remain in higher-performance modes while other components use deeper power-saving modes.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS9235251B2Dynamic low power mode implementation for computing devices
Publication Date: 2016.01.12 QUALCOMM INC
  • US9235251B2 patent drawing
  • US9235251B2 patent drawing
  • US9235251B2 patent drawing

AI summary

The aspects enable a computing device or microprocessor to determine a low power mode that provides the most system power savings by placing selected resources in a low power mode while continuing to function reliably, depending upon the resources not in use, acceptable system latencies, dynamic operating conditions (e.g., temperature), expected idle time, and the unique electrical characteristics of the particular device. Aspects provide a mechanism for determining an optimal low power configuration made up of a set of low power modes for the various resources within the computing device by determining which low power modes are valid at the time the processor enters an idle state, ranking the valid low power modes by expected power savings given the current device conditions, determining which valid low power mode provides the greatest power savings while meeting the latency requirements, and selecting a particular low power mode for each resource to enter.