Dynamic Low Power Mode Thresholds for Multi-Core Thread Scheduling
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Solution Overview
Problem
In multiple core data processing systems, fixed inactive times for threads lead to inefficiency and increased power dissipation due to inefficient transitions between active and on-hold operations, as existing power conservation techniques do not account for varying priorities and optimal low power mode durations for different components.
Innovation Solution
A method and system that utilize a thread priority register and low power control circuitry to dynamically determine the execution order of threads and set component-specific low power mode time thresholds, allowing components to remain in low power mode only for a customized minimum time based on their type and usage patterns, thereby optimizing power conservation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a fixed inactive time is used for all threads, then power conservation is simplified, but system efficiency decreases and power dissipation increases due to inefficient transitions
Solution Approach 1:
The patent applies dynamics by transitioning from a fixed inactive time to a dynamic, component-specific low power mode time threshold. Each system component (e.g., L2 cache, L3 cache, memory) has its own configurable threshold that adapts to its characteristics, allowing optimal power savings without fixed timing constraints that harm system efficiency.
Solution Approach 2:
The patent changes the parameter of inactive time from a fixed value to variable component-specific thresholds. By configuring different low power mode time thresholds for different components (e.g., shorter for L2 cache, longer for memory), the system optimizes both power dissipation and efficiency by matching timing parameters to component characteristics.
2Loss of energy
If threads are delayed to wait for low power mode completion, then power consumption is reduced, but execution time increases for low priority threads
Solution Approach 1:
The patent applies local quality by allowing different threads to have different waiting behaviors based on their priority. High priority threads can interrupt and force immediate component activation, while low priority threads must wait for the low power mode time threshold to complete. This localized differentiation resolves the contradiction by applying different time penalties to different thread classes.
Solution Approach 2:
The system dynamically adjusts thread execution timing based on priority and component state. The low power mode time threshold acts as a dynamic parameter that can be overridden by high priority threads, creating a flexible system that balances power consumption and execution time based on real-time conditions rather than fixed rules.
3Loss of energy
If components remain in low power mode for longer periods, then power savings increase, but system responsiveness decreases when threads need to resume
Solution Approach 1:
The patent changes the low power mode duration from a uniform fixed value to variable component-specific thresholds. By configuring appropriate thresholds for each component type (e.g., shorter for frequently accessed caches, longer for less accessed memory), the system achieves power savings while maintaining responsiveness for time-critical operations.
Solution Approach 2:
The system dynamically manages the transition between low power mode and operational mode based on thread priority and component characteristics. High priority threads can trigger immediate activation, creating a dynamic response mechanism that preserves system responsiveness while allowing extended low power mode for low priority operations.
Data Source
AI summary
A selected thread is scheduled to run on a corresponding master of a multiple threaded processing system. When the priority of the selected thread is high, the selected thread is run on the corresponding master. When the priority of the selected thread is low and the corresponding master is in an operational mode, the selected thread is run on the corresponding master. When the priority of the selected thread is low and the corresponding master is in a low power mode, the selected thread is selectively run on the corresponding master based on an amount of time that the corresponding master has been in the low power mode since its most recent entrance into the low power mode.