Dynamic Low Power State Characterization for Processor Idle Management

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Increased integration of digital processors leads to higher power consumption and dissipation, limiting the functionality and battery life of portable devices, as conventional methods for determining optimal low power states are static and do not account for changes over the device's operational lifetime.

Innovation Solution

A system for dynamic low-power characterization that includes a processor, a detector, and a calibration unit, which measures and compares power consumption across various idle states to select an optimal low power state based on expected idle periods, allowing for automated refinement and tuning of power parameters.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If the processor uses deeper low power states to reduce power consumption, then power savings increase, but the wake-up time and processing delay increase

Engineering Contradiction:
Improvepower consumptionVSAvoidwake-up time
Core Design Contradiction:
Use of energy by moving objectVSLoss of time

Solution Approach 1:

The system dynamically adjusts the selection of low power states based on the predicted duration of idle periods. Instead of using a fixed power state mapping, the calibration unit learns and adapts the optimal power state for different idle time scenarios, making the power state selection flexible and context-dependent to balance power savings against wake-up time requirements

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the parameter of power state selection based on the predicted idle period duration. The calibration unit modifies which power state is selected by changing the idle time threshold parameters, allowing the system to transition between different power states (C-states) depending on whether the idle period is short or long, thus optimizing the trade-off between power consumption and wake-up time

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If static power state thresholds are used, then the system is simple to implement, but it cannot adapt to changes in power consumption characteristics over the device lifetime

Engineering Contradiction:
Improveadaptability to lifetime changesVSAvoidsystem complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The calibration unit performs self-calibration by automatically measuring the actual power consumption in different low power states and independently determining the optimal power state selections without requiring external intervention or manual configuration. The system serves itself by learning its own power consumption characteristics and adapting its power state policy accordingly

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The system implements a feedback mechanism where the calibration unit continuously monitors and measures the actual power consumption in different power states, compares it with expected values, and uses this feedback information to refine and update the power state selection thresholds. This closed-loop feedback enables the system to adapt to drifts in power consumption characteristics over time

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS9733696B2Dynamic low power states characterization
Publication Date: 2017.08.15 TEXAS INSTRUMENTS INC
  • US9733696B2 patent drawing
  • US9733696B2 patent drawing
  • US9733696B2 patent drawing

AI summary

An optimal idle state of a processor is selected using dynamically derived parameters. For example, the idle state is selected from a group of possible idle power states. A current detector is arranged to perform power measurements of the processor and to report a total power consumption of the processor for each time value of a range of discrete values for each possible idle power state. A calibration unit is arranged to communicate with the current detector and the processor, and to automatically activate a calibration sequence that is used to produce data from which idle power state is optimal for the processor for an estimated idle period.