Dynamic Mapping for Concurrent Flawscan in Storage Devices

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Solution Overview

Problem

Current disk drives face challenges in reducing manufacturing time and costs associated with flawscan processing, which is time-consuming and costly, while maintaining quality standards.

Innovation Solution

Implementing a dynamically mapped storage device that allows for concurrent flawscan testing during manufacturing and after installation, enabling initial and final flawscan procedures to be performed efficiently, reducing the need for extensive initial testing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional flawscan processing is performed on all physical capacity during manufacturing, then quality standards are maintained, but manufacturing time and costs increase significantly

Engineering Contradiction:
Improvequality standardVSAvoidmanufacturing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent divides the flawscan process into two segments: an initial flawscan performed during manufacturing that tests only a portion of the physical capacity to certify available space, and a final flawscan performed after installation that tests the remaining physical capacity. This segmentation allows manufacturing to proceed faster while still ensuring complete quality verification eventually.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The initial flawscan serves as a preliminary action during manufacturing that certifies a portion of the physical capacity as available. This preliminary testing provides sufficient quality assurance for manufacturing purposes without requiring complete testing, thereby reducing manufacturing time while maintaining quality standards.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If traditional flawscan processing is performed on all physical capacity during manufacturing, then complete quality verification is achieved, but manufacturing costs increase significantly

Engineering Contradiction:
Improvequality verificationVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent segments the quality verification process into two phases: initial verification during manufacturing and final verification after installation. This allows the manufacturer to perform less expensive initial testing while ensuring complete quality verification is eventually performed, thereby reducing manufacturing costs without compromising overall quality assurance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The initial flawscan performs a preliminary quality verification that is sufficient for manufacturing decisions. This preliminary action reduces the need for expensive complete testing during manufacturing, while the final flawscan after installation ensures comprehensive quality verification is ultimately achieved.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If dynamic mapping is implemented to enable concurrent flawscan testing, then manufacturing efficiency is improved, but device complexity increases

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoidmapping structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements dynamic mapping that allows logical block addresses to be mapped to different physical locations depending on whether the space is certified available or uncertified. This dynamic adaptation enables the system to support concurrent initial and final flawscan operations, improving manufacturing efficiency despite the increased complexity of the mapping structure.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS7653847B1Methods and structure for field flawscan in a dynamically mapped mass storage device
Publication Date: 2010.01.26 SEAGATE TECH LLC
  • US7653847B1 patent drawing
  • US7653847B1 patent drawing
  • US7653847B1 patent drawing

AI summary

Methods and structures for performing field flawscan to reduce manufacturing costs of a dynamic mapped storage device. In a dynamic mapped storage device in which all user supplied logical blocks are dynamically mapped by the storage device controller to physical disk blocks, features and aspects hereof permit flawscan testing of a storage device to be completed substantially concurrently with processing write requests for its intended application. A fraction of the storage device may be certified by an initial flawscan performed during manufacturing testing. Statistical sampling sufficient to assure a high probability of achieving specified capacity may be performed to reduce manufacturing time and costs in testing. Final flawscan of the remainder of the storage locations may be performed substantially concurrently with processing of write requests after the device is installed for its intended application. Mapping features and aspects hereof allow the storage device controller to perform flawscan and write operations concurrently.