Dynamic Memory Address Remapping for Security

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Solution Overview

Problem

Existing computing systems are vulnerable to cryptanalytic attacks and traffic analysis due to observable memory access patterns, which can reveal sensitive information about the system's operations and data locations.

Innovation Solution

Implementing a method to dynamically remap the logical address space to the physical address space in response to data accesses, using a memory controller to obfuscate memory access patterns by changing the physical addresses while keeping the logical addresses unchanged, thereby hiding the access patterns from attackers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If memory access patterns are left observable, then system performance and simplicity are maintained, but security is compromised due to vulnerability to cryptanalytic attacks and traffic analysis

Engineering Contradiction:
ImprovesecurityVSAvoidaddress management complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces a memory controller as an intermediary component between the processor and system memory. This memory controller implements the address remapping function, separating the security-critical address translation task from the processor itself. The memory controller dynamically remaps logical addresses to physical addresses without requiring changes to the processor architecture or application software, thus improving security while maintaining relative system simplicity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent implements dynamic address remapping where the mapping between logical and physical addresses changes over time. Instead of a static address translation table, the system periodically updates the physical address assignments for given logical addresses. This dynamic behavior prevents attackers from deducing memory access patterns through repeated observations, as the same logical address may map to different physical addresses at different times.

Inventive Principle:
Principle #15Dynamics

2Reliability

If dynamic remapping is implemented at every data access, then memory access pattern security is maximized, but processing overhead and time consumption increase

Engineering Contradiction:
Improvesecurity against traffic analysisVSAvoidaddress remapping time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent employs periodic remapping where the address translation table is updated at regular intervals or after a certain number of access operations rather than at every single access. This periodic update strategy maintains security by frequently changing the mapping relationships while reducing the overhead compared to remapping every access. The system balances security requirements with performance considerations by choosing appropriate remapping intervals.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The system performs preliminary actions by pre-generating multiple address mapping tables in advance. Instead of computing new mappings on-demand during each access operation, the memory controller prepares multiple valid address translation tables beforehand. When remapping is needed, the system can quickly switch between pre-computed tables, significantly reducing the time penalty associated with address translation while still achieving the security benefit of changing mappings.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP2998869B1Dynamic memory address remapping in computing systems
Publication Date: 2018.11.07 THE BOEING CO
  • EP2998869B1 patent drawingFigure 1
  • EP2998869B1 patent drawingFigure 2A~2B
  • EP2998869B1 patent drawingFigure 2C~4

AI summary

A method provides security in a computing system including a processor having a logical address space and external system memory having physical address space. The method comprises hiding memory access patterns, including dynamically remapping the logical address space to the physical address space in response to data accesses to the logical address space.