Dynamic Memory Allocation for Access Speed Bottlenecks

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Solution Overview

Problem

Information processing systems face a decrease in access speed due to capacity shortages in main storage devices, leading to data swapping out to auxiliary storage devices with lower access speeds, which results in processing delays and reduced reliability.

Innovation Solution

A management apparatus is introduced that includes a communication circuit and processing circuit to detect increased memory usage and switch data transmission destinations from a first information processing apparatus with a DRAM to a second apparatus with a data center persistent memory (DCPM), avoiding swapping out and maintaining high access speeds by utilizing a larger capacity main storage device.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If data is swapped out to auxiliary storage device when main storage device capacity is insufficient, then storage capacity is increased, but access speed decreases

Engineering Contradiction:
Improvestorage capacityVSAvoidaccess speed
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

The system segments storage resources by introducing a storage pool that can be dynamically allocated to multiple information processing apparatuses. Instead of each apparatus having fixed storage capacity, the storage pool is divided and assigned based on demand, allowing efficient utilization of storage resources while maintaining fast access speeds through selective allocation to apparatuses with insufficient capacity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The storage pool serves multiple functions and multiple information processing apparatuses simultaneously. A single storage pool can be allocated to different apparatuses as needed, providing universal storage capacity that eliminates the need for each apparatus to have dedicated high-capacity storage, thereby avoiding access speed degradation while ensuring sufficient capacity when needed.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Quantity of substance

If additional high-capacity storage is provided for each processing scenario, then storage capacity is increased, but system complexity and cost increase

Engineering Contradiction:
Improvestorage capacityVSAvoidsystem complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

Multiple storage resources are merged into a unified storage pool that serves all information processing apparatuses. Instead of providing separate storage systems for each apparatus, the storage capacities are combined and managed centrally, then dynamically allocated as needed. This reduces overall system complexity while ensuring adequate storage capacity is available to any apparatus that requires it.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The storage allocation is dynamic rather than static. The storage pool can be flexibly allocated to different information processing apparatuses based on real-time capacity needs. When an apparatus experiences capacity shortage, storage is allocated from the pool; when capacity is sufficient, allocation is reduced or released back to the pool, allowing adaptive response to changing storage requirements without fixed complex configurations.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11366595B2Management apparatus and non-transitory computer-readable storage medium for storing program
Publication Date: 2022.06.21 FUJITSU LTD
  • US11366595B2 patent drawing
  • US11366595B2 patent drawing
  • US11366595B2 patent drawing

AI summary

A management apparatus includes: a communication circuit configured to communicate with a first information processing apparatus and a second information processing apparatus, the first information processing apparatus including a first memory and a second memory, the second information processing apparatus including a third memory and a fourth memory, a total capacity of the third memory and the fourth memory being larger than a capacity of the first memory; and a processing circuit configured to obtain, via the communication circuit, a data volume received by the first information processing apparatus from a third information processing apparatus, detect an increase in usage of the first memory based on the data volume, and perform control to switch, in response to the increase in the usage of the first memory, a destination of data transmission by the third information processing apparatus from the first information processing apparatus to the second information processing apparatus.