Dynamic Memory Address Space Allocation for ASICs
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Solution Overview
Problem
In microprocessor-based systems, the static allocation of memory address space lengthens the realization time due to the unknown sizes of physical memories like ROM and RAM, limiting flexibility and increasing time-to-market for system manufacturing.
Innovation Solution
Implementing a dynamic memory address space allocation method where an overlap region is initially selected to account for maximum memory sizes, with dynamic pointers set during boot or runtime to determine actual boundaries, allowing for flexible allocation and access between different memory types.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If static memory address space allocation is used, then memory space can be allocated in advance, but the realization time for the system is lengthened due to unknown physical memory sizes
Solution Approach 1:
The patent applies dynamics by transitioning from static memory address space allocation to dynamic allocation. The system uses a dynamic memory manager that can allocate and deallocate memory regions at runtime based on actual physical memory sizes and system requirements. This allows the memory allocation strategy to adapt to changing conditions during system operation, resolving the contradiction between having pre-allocated memory spaces and needing flexibility to accommodate unknown physical memory configurations.
Solution Approach 2:
The patent changes the parameter of memory allocation from fixed/static to variable/dynamic. By implementing a dynamic memory manager that can modify memory region boundaries and sizes during runtime, the system adapts to actual physical memory capacities. This parameter change enables the system to achieve both efficient memory utilization and flexibility in accommodating different physical memory configurations without extending realization time.
2Ease of manufacture
If static address space partitioning is implemented, then memory space is predetermined, but system manufacturing time is increased due to unknown physical memory sizes
Solution Approach 1:
The patent applies preliminary action by pre-establishing a dynamic memory manager and memory allocation framework during system design, rather than finalizing specific memory mappings. This preliminary structure enables the system to be manufactured with flexible memory allocation capabilities built-in, allowing actual memory configurations to be determined at runtime without extending manufacturing time. The dynamic memory manager is prepared in advance to handle various physical memory sizes and configurations.
3Adaptability or versatility
If dynamic memory allocation is implemented, then flexibility and adaptability are improved, but system complexity increases
Solution Approach 1:
The patent introduces a dynamic memory manager as an intermediary component between the operating system and physical memory hardware. This mediator handles the complexity of dynamic allocation and deallocation operations, providing a simplified interface for memory management. The dynamic memory manager abstracts the underlying physical memory details, allowing the rest of the system to benefit from flexibility and adaptability without directly managing the complexity of memory region boundaries and allocations.
Data Source
AI summary
A memory address space for each of a plurality of physical memories in a microprocessor-based system is allocated prior to knowing the desired logical size of at least one of the physical memories. At least two of the allocated memory address spaces overlap at least a portion of each other. After the system is fabricated, a pointer value set that corresponds to an address boundary between at least two physical memories of the fabricated system is set during boot time and/or during run time when the size of the physical memories are known. The technique provides a faster time-to-market for microprocessor-based systems by allowing, for example, Application Specific Integrated Circuits (ASICs) comprising microprocessor systems on-chip be manufactured prior to the final firmware and software being fully developed. Additionally, the subject matter disclosed herein permits changes in memory-space allocation for finalized ASIC designs.