Dynamic Memory Allocation for Data Storage Controllers

The patent implements dynamic memory allocation where the working memory device's storage capacity is not fixed but can be adjusted based on operational needs. The controller dynamically allocates memory space between the address mapping table and data buffer regions, allowing the system to optimize access speed for different workloads without requiring a permanently larger memory device, thus avoiding increased manufacturing costs.

The system changes the parameter of memory allocation by dividing the working memory device into variable regions. The address mapping table region and data buffer region can be resized based on the characteristics of data access patterns. This parameter adjustment allows the system to achieve high access speeds for both sequential and random access operations without needing to increase the total memory capacity, thereby maintaining cost-effectiveness.

The working memory device is segmented into at least two distinct regions: an address mapping table region and a data buffer region. This segmentation allows each region to be optimized for its specific function while sharing the same physical memory resource. The address mapping table region stores translation information for efficient address conversion, while the data buffer region handles data operations, thereby improving overall memory resource utilization without compromising address conversion efficiency.

The working memory device serves multiple functions simultaneously by implementing a unified memory structure that accommodates both the address mapping table and data buffer. This multi-functional design allows a single memory device to perform both address translation and data caching operations, improving versatility and resource utilization while maintaining the productivity benefits of having dedicated regions for each function.