Dynamic Memory Bandwidth Allocation for Network Devices

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Solution Overview

Problem

The high cost and power consumption of high-speed serializer-deserializer (SERDES) circuits used for interfaces between network devices and external packet memories, which are often unnecessary for handling infrequent transient traffic bursts, make fixed bandwidth allocations cost-prohibitive and inefficient.

Innovation Solution

A dynamically allocated interface that adjusts bandwidth based on the congestion states of internal and external packet memory buffers, using a bandwidth allocation table to optimize read and write operations, thereby improving bandwidth utilization and reducing the need for excessive SERDES circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If high-speed SERDES circuits are implemented to provide adequate bandwidth for external packet memory interface, then memory bandwidth is improved, but product cost and power consumption increase significantly

Engineering Contradiction:
Improvememory bandwidthVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic bandwidth allocation that adjusts the interface bandwidth between network device and external packet memory based on real-time traffic conditions. During transient bursts, high bandwidth is allocated; during normal conditions, bandwidth is reduced. This dynamic adjustment resolves the contradiction by providing high speed only when necessary, thereby reducing overall power consumption while maintaining adequate memory bandwidth capability.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the bandwidth parameter of the external memory interface dynamically based on traffic patterns. By monitoring traffic conditions and adjusting the interface bandwidth parameter accordingly, the system achieves high memory bandwidth during bursts while minimizing power consumption during normal operation, thus resolving the contradiction between speed and energy use.

Inventive Principle:
Principle #35Parameter changes

2Speed

If high-speed SERDES circuits are implemented to handle transient traffic bursts, then memory bandwidth is improved, but product cost increases

Engineering Contradiction:
Improvememory bandwidthVSAvoidproduct cost
Core Design Contradiction:
SpeedVSEase of manufacture

Solution Approach 1:

The patent employs dynamic bandwidth allocation that activates high-speed interface operation only during transient traffic bursts. During normal traffic conditions, the interface operates at reduced bandwidth. This dynamic approach resolves the contradiction by providing high memory bandwidth capability only when needed for bursts, thereby avoiding the continuous cost of implementing full-speed interface circuitry while still being able to handle burst traffic effectively.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system implements partial bandwidth allocation rather than full bandwidth continuously. By allocating high bandwidth only partially (during bursts) and reducing bandwidth during normal conditions, the system achieves the necessary memory bandwidth for transient bursts without incurring the full cost of implementing continuously operating high-speed interface circuitry.

Inventive Principle:
Principle #16Partial or excessive action

3Device complexity

If fixed bandwidth allocation is used for external memory interface, then implementation simplicity is improved, but bandwidth utilization efficiency deteriorates

Engineering Contradiction:
Improveinterface implementation complexityVSAvoidbandwidth utilization efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent transitions from fixed bandwidth allocation to dynamic bandwidth allocation. The system monitors traffic conditions and adjusts the external memory interface bandwidth dynamically, allocating higher bandwidth during transient bursts and lower bandwidth during normal conditions. This dynamic approach resolves the contradiction by optimizing bandwidth utilization efficiency without significantly increasing interface implementation complexity, as the dynamic adjustment is managed through control logic that responds to traffic patterns.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system implements feedback-based bandwidth allocation where traffic conditions are monitored and fed back to control the interface bandwidth allocation. This feedback mechanism enables the system to automatically adjust bandwidth utilization based on actual needs, resolving the contradiction between implementation simplicity and bandwidth utilization efficiency by using straightforward feedback control rather than complex allocation schemes.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS8755271B2Dynamic memory bandwidth allocation
Publication Date: 2014.06.17 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US8755271B2 patent drawing
  • US8755271B2 patent drawing
  • US8755271B2 patent drawing

AI summary

Methods and apparatus for dynamic bandwidth allocation are disclosed. An example method includes determining, by a network device, at least one of a congestion state of a packet memory buffer of the network device and a congestion state of an external packet memory that is operationally coupled with the network device. The example method further includes dynamically adjusting, by the network device, respective bandwidth allocations for read and write operations between the network device and the external packet memory, the dynamic adjusting being based on the determined congestion state of the packet memory buffer and/or the determined congestion state of the external packet memory.