Dynamic Memory Chip Allocation for Command Queue Throughput
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Solution Overview
Problem
Current memory apparatuses using NAND-type flash memory face inefficiencies in access throughput due to suboptimal allocation of memory chips to command queues, leading to underutilization of memory resources.
Innovation Solution
A memory apparatus with a controller that dynamically allocates a first memory chip to either the first or second memory based on availability, enqueuing commands to the allocated memory, thereby optimizing chip usage and improving access throughput.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If memory chips are statically allocated to command queues, then device complexity is reduced, but access throughput deteriorates due to underutilization of memory resources
Solution Approach 1:
The patent implements dynamic allocation of memory chips to command queues, where the controller continuously monitors queue depths and memory chip availability, reallocating chips to queues that need processing. This dynamic approach increases access throughput by ensuring memory resources are actively utilized, while the complexity is managed through automated control logic that tracks allocation states and makes reallocation decisions based on current system conditions.
2Productivity
If more memory chips are allocated to command queues, then access throughput is improved, but memory resource utilization deteriorates due to fragmentation and idle allocation
Solution Approach 1:
The controller implements a feedback mechanism that continuously monitors the depth of each command queue and the allocation status of memory chips. When a queue becomes empty or its depth decreases below a threshold, the controller receives feedback and automatically reclaims the allocated memory chip for reallocation to other queues. This feedback-driven approach ensures high access throughput by maintaining adequate chip allocation while preventing resource waste through automatic reclamation of idle resources.
3Productivity
If memory chips are frequently reallocated to optimize throughput, then access throughput is improved, but system stability deteriorates due to allocation fluctuations
Solution Approach 1:
The patent employs threshold-based parameter changes for memory chip allocation, where the controller monitors queue depth parameters and only triggers reallocation when parameters cross predefined thresholds. This approach smooths allocation fluctuations by preventing unnecessary reallocations for minor queue depth variations, thereby maintaining system stability. Meanwhile, significant threshold crossings ensure timely reallocations that maintain high access throughput, achieving a balance between stability and performance.
Data Source
AI summary
According to one embodiment, a memory apparatus includes a memory device and a controller. The memory device includes a plurality of memory chips. The controller includes a plurality of memories. The controller determines whether or not the memory chip is allocated to any one memory when receiving an access request related to the memory chip from a host apparatus. The controller newly allocates the memory chip to the memory to which none of the memory chips is allocated when it is determined that the memory chips is not allocated, and enqueues a command corresponding to the access request received from the host apparatus to the memory to which the memory chip is newly allocated.


