Dynamic Memory Channel Interleave Granularity Adjustment

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Solution Overview

Problem

Existing memory channel interleaving techniques require all channels to be activated, leading to wasted power and no meaningful benefit in low-performance use cases, as they do not dynamically adjust interleave granularity based on performance requirements.

Innovation Solution

A system and method for dynamically adjusting memory channel interleave granularity, comprising a memory management unit (MMU) and an address translator that select and encode interleave granularities for memory pages, allowing for intelligent selection of interleave boundaries based on performance requirements, power profiles, and memory traffic levels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If fixed memory channel interleaving is used to distribute memory traffic uniformly across all channels, then memory performance is optimized, but power consumption increases due to all channels being activated

Engineering Contradiction:
Improvememory performanceVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic memory channel interleaving where the interleave granularity can be adjusted based on performance requirements and power profiles. The system transitions from static fixed interleaving to dynamic adjustable interleaving, allowing the memory controller to select different interleave granularities (e.g., 128 bytes, 256 bytes, 512 bytes) depending on the workload characteristics, thus optimizing the balance between performance and power consumption

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the interleave granularity parameter dynamically based on performance requirements and power profiles. By modifying this key parameter, the system can activate only the necessary number of memory channels for a given workload, reducing power consumption while maintaining adequate performance. The interleave granularity parameter directly controls how memory addresses are distributed across channels, enabling selective channel activation

Inventive Principle:
Principle #35Parameter changes

2Productivity

If all memory channels are activated for high performance use cases, then desired performance level is achieved, but power is wasted in low performance use cases

Engineering Contradiction:
Improveperformance levelVSAvoidwasted power
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent applies partial action by activating only the necessary subset of memory channels required for the current workload's performance needs. Instead of always activating all channels (excessive action), the system dynamically determines the minimum number of channels needed based on the performance requirements and power profile, thereby avoiding energy waste while still meeting performance targets

Inventive Principle:
Principle #16Partial or excessive action

3Stability of the object's composition

If fixed channel interleaving is used, then memory traffic is uniformly distributed, but adaptability to different performance requirements is reduced

Engineering Contradiction:
Improveuniform traffic distributionVSAvoidadaptability to performance requirements
Core Design Contradiction:
Stability of the object's compositionVSAdaptability or versatility

Solution Approach 1:

The patent transforms the static fixed interleaving scheme into a dynamic system that can adapt to different performance requirements. The interleave granularity becomes a variable parameter that can be adjusted based on workload characteristics and power profiles, enabling the system to maintain uniform traffic distribution when needed while also adapting to varying performance demands across different应用场景

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10628308B2Dynamic adjustment of memory channel interleave granularity
Publication Date: 2020.04.21 QUALCOMM INC
  • US10628308B2 patent drawing
  • US10628308B2 patent drawing
  • US10628308B2 patent drawing

AI summary

Systems, methods, and computer programs are disclosed for dynamically adjusting memory channel interleave granularity. An embodiment of a system comprises a plurality of memory clients, a memory management unit (MMU), and an address translator. The plurality of memory clients are electrically coupled to each of a plurality of memory channels via an interconnect. The MMU is configured to receive a request for a memory allocation request for one or more memory pages from one of the plurality of memory client and, in response, select one of a plurality of interleave granularities for the one or more memory pages. The address translator is configured to translate a physical address to interleave memory data associated with the one or more memory pages at the selected interleave granularity.