Dynamic Memory Address Mapping for Secure MMIO Scaling
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Solution Overview
Problem
Existing memory mapped input/output (MMIO) technologies face issues of large resource consumption and security vulnerabilities due to increased address mapping range as the number of memory devices or memory size grows, leading to inefficiencies and potential security risks.
Innovation Solution
A memory device with an address translator that converts physical addresses to device addresses dynamically in response to interrupts, using a local processor to control the address translator and minimize the address register size, allowing efficient access to different memory regions without delays or security breaches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the address mapping range is increased to support more memory devices or larger memory size, then the memory device can access more memory regions, but the resource consumption increases and security vulnerabilities arise
Solution Approach 1:
The patent implements dynamic address mapping where the address translator can change the mapping relationship between device addresses and physical addresses based on interrupt signals. Instead of having a fixed large address mapping range, the system dynamically adjusts the mapping to only what is needed at any given time, reducing resource consumption while maintaining the ability to access different memory regions when required.
2Adaptability or versatility
If the address mapping range is increased to support more memory devices or larger memory size, then the memory device can access more memory regions, but security vulnerabilities increase
Solution Approach 1:
The dynamic address mapping mechanism allows the system to adjust the visible address space based on security requirements. When interrupts are received, the mapping is updated to allow access to specific memory regions, and when not needed, the mapping range is reduced, thereby minimizing security vulnerabilities associated with large exposed address spaces.
Solution Approach 2:
The address translator acts as an intermediary between the device address space and the physical memory address space. It mediates access requests by translating device addresses to physical addresses according to current mapping configurations, providing a security layer that controls which memory regions are accessible at any given time without exposing the entire physical address space.
3Ease of operation
If a fixed address mapping is used, then the address register size must be large to cover all possible memory regions, but this increases device complexity and resource consumption
Solution Approach 1:
Instead of using a large fixed address register to cover all possible memory regions, the patent employs a dynamic mapping approach where the address translator creates mappings on-demand based on interrupt signals. This allows the use of smaller address registers while still providing access to large memory spaces when needed, reducing device complexity without sacrificing operational capability.
Data Source
AI summary
Provided are a memory device and a method for dynamically mapping address thereof, in which the memory device includes a memory including a plurality of memory regions, an address register in which at least one of a memory device different from the memory device or a host stores a device address for accessing the memory, and an address translator configured to receive a first interrupt, and in response to the first interrupt, convert a physical address of the memory mapped to the device address.