Dynamically Replicated Memory for PRAM Fault Recovery

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Solution Overview

Problem

Phase-change memory (PRAM) technologies face limitations in write endurance and variability as they scale to near-atomic dimensions, leading to hard failures that existing systems for managing DRAM and flash memory do not easily map to, necessitating a low-overhead method for detecting and recovering from memory faults.

Innovation Solution

The implementation of a dynamically replicated memory system that detects memory faults by writing and reading data, uses parity bits and intentional bit flipping to record errors, dynamically allocates new memory space by pairing compatible faulty pages, and schedules access to replicated memory pages through 'lazy' or 'eager' replication policies to ensure data integrity and system performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If PRAM cells are scaled to near-atomic dimensions to increase memory capacity, then memory density is improved, but write endurance deteriorates and variability increases causing hard failures

Engineering Contradiction:
Improvememory capacityVSAvoidwrite endurance
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The memory system is segmented into multiple copies of memory pages. Instead of relying on a single PRAM cell's reliability, the system divides data storage across multiple physical pages, allowing individual page failures without complete system failure. This segmentation enables the system to tolerate hard failures in scaled PRAM cells while maintaining overall memory reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system changes the operational parameters of memory management by implementing dynamic replication and on-the-fly copying. When a page failure is detected, the system immediately changes the state of that memory location by copying it to a new page, thereby adapting to the degraded reliability conditions of scaled PRAM cells.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If dynamic replication and fault detection mechanisms are implemented to improve reliability, then memory fault detection accuracy is improved, but device complexity increases

Engineering Contradiction:
Improvefault detection accuracyVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The memory system performs self-diagnosis and self-repair through automatic fault detection and on-the-fly copying mechanisms. The system monitors its own memory pages for failures and automatically recovers from detected faults without external intervention, thereby improving reliability while managing complexity through automation rather than additional hardware.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The system performs preliminary actions by maintaining ready lists of available memory pages in advance. When a failure is detected, the recovery process can immediately utilize pre-identified replacement pages rather than searching for available memory, thereby reducing the complexity of fault management while improving detection and response accuracy.

Inventive Principle:
Principle #10Preliminary action

3Quantity of substance

If memory pages are dynamically copied and reclaimed to recover from failures, then memory utilization is improved, but loss of time occurs due to copying operations

Engineering Contradiction:
Improvememory utilizationVSAvoidcopying time
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The system implements periodic monitoring of memory page integrity through parity bit checking. By periodically detecting faults rather than continuously monitoring, the system balances the need for reliable fault detection with the time cost of monitoring operations. This periodic action allows the system to maintain high memory utilization while minimizing the time overhead associated with fault detection and recovery copying.

Inventive Principle:
Principle #19Periodic action

4Measurement precision

If parity bits and intentional bit flipping are used to detect and record errors, then measurement precision of errors is improved, but device complexity increases

Engineering Contradiction:
Improveerror detection precisionVSAvoiderror recording complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The system uses simple parity bit copying and comparison to detect errors with high precision. By copying the original data and comparing it with the retrieved data along with parity bits, the system achieves accurate error detection without complex error correction codes. This copying approach provides high measurement precision while maintaining relatively simple device complexity compared to more sophisticated error correction mechanisms.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS9916116B2Memory access and detecting memory failures using dynamically replicated memory based on a replication policy
Publication Date: 2018.03.13 MICROSOFT TECHNOLOGY LICENSING LLC
  • US9916116B2 patent drawing
  • US9916116B2 patent drawing
  • US9916116B2 patent drawing

AI summary

Dynamically replicated memory is usable to allocate new memory space from failed memory pages by pairing compatible failed memory pages to reuse otherwise unusable failed memory pages. Dynamically replicating memory involves detecting and recording memory faults, reclaiming failed memory pages for later use, recovering from detected memory faults, and scheduling access to replicated memory pages.