Dynamic Memory Priority Control for FIFO Buffer Overflow Prevention
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Solution Overview
Problem
In conventional electronic apparatuses, devices with lower priorities are often unable to transfer data efficiently due to buffer overflow or underflow, leading to restricted operations as higher-priority devices dominate data transfer.
Innovation Solution
A memory control apparatus that dynamically adjusts priority orders based on buffer occupancy levels, using urgency notice signals and threshold settings to ensure efficient data transfer operations across multiple devices, employing Direct Memory Access to avoid CPU burden.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If fixed priority order is assigned to devices for data transfer, then higher-priority devices can always transfer data preferentially, but lower-priority devices may have their buffers become empty or filled up, forcing them to stop operations
Solution Approach 1:
The patent implements dynamic priority adjustment by monitoring buffer occupancy levels and automatically changing priority orders. When a buffer becomes nearly empty or full, the system dynamically reassigns priorities to ensure continuous operation, transforming the static priority system into a dynamic one that adapts to real-time buffer states.
Solution Approach 2:
The system employs feedback mechanisms by continuously monitoring buffer occupancy levels and using this information to adjust priority assignments. The buffer state information feeds back to the priority management logic, which then modifies transfer priorities to prevent buffer overflow or underflow, ensuring stable operation.
2Reliability
If lower-priority devices are allowed to transfer data, then buffer overflow and underflow can be prevented, but data transfer efficiency may be reduced due to frequent priority switches
Solution Approach 1:
The system performs preliminary actions by setting threshold values for buffer occupancy levels in advance. When buffer levels approach these predetermined thresholds, the system proactively adjusts priorities before overflow or underflow occurs, preventing problematic states rather than reacting to them after they occur.
Solution Approach 2:
The priority adjustment operates periodically based on buffer state monitoring rather than continuously. The system checks buffer levels at regular intervals and adjusts priorities only when necessary, reducing the frequency of priority switches while maintaining buffer stability.
3Productivity
If multiple devices compete for data transfer simultaneously, then data processing can be parallelized, but buffer management becomes complex leading to overflow or underflow
Solution Approach 1:
The system manages buffer complexity by changing the priority parameter dynamically based on buffer occupancy states. Instead of managing multiple complex buffer allocation schemes, the system uses a simple priority parameter that can be adjusted between high and low states, reducing management complexity while supporting multiple parallel devices.
Data Source
AI summary
For an electronic apparatus in which data is transferred between a plurality of processing devices and a memory, a technique is provided which prevents the data transfer from being restricted and allows the processing devices to operate efficiently. The order of priorities of data transfer operations through channels is changed on the basis of a relation between thresholds and the amounts of data remaining respectively in FIFO buffers. This prevents the FIFO buffers from becoming empty of data, or from being filled up with data, which allows the devices to operate efficiently.