Dynamic Memory Read Level Calibration via Variable Step Adjustment

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Memory systems, such as solid-state drives, face performance issues due to variations in storage circuitry and degradation over time, leading to errors and inefficiencies in data storage and retrieval.

Innovation Solution

A dynamic and continuous read level calibration mechanism is implemented using a variable adjustment mechanism that gathers samples, calculates error measures, and adjusts processing levels to minimize errors, switching between larger and smaller step sizes based on changing conditions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If fixed processing levels are used in memory systems, then device complexity is reduced, but measurement precision deteriorates due to variations in storage circuitry and degradation over time

Engineering Contradiction:
Improveread level accuracyVSAvoidcalibration mechanism complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent implements dynamic calibration mechanisms that continuously adjust processing levels based on changing conditions in the memory system. The calibration process adapts to degradation over time and circuit variations by modifying read levels and other processing parameters in real-time, transforming fixed parameters into dynamic ones that respond to system state changes.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent employs feedback loops where the system monitors performance metrics and error rates, then uses this information to adjust processing levels. The calibration mechanism receives feedback about actual read outcomes and modifies subsequent operations to compensate for drift and degradation, creating a closed-loop control system that maintains precision despite changing conditions.

Inventive Principle:
Principle #23Feedback

2Reliability

If continuous calibration is performed, then reliability is improved, but productivity decreases due to additional processing overhead

Engineering Contradiction:
Improvedata accuracyVSAvoiddata access speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements periodic calibration cycles rather than continuous calibration, where the system performs calibration at scheduled intervals or under specific conditions. This approach maintains reliability by regularly updating processing levels while minimizing productivity impact by keeping the calibration process discrete and time-bound rather than constant.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent applies calibration selectively to only those memory regions or operations that require it, rather than calibrating the entire system uniformly. This partial action approach focuses calibration resources on areas where degradation or variations are most impactful, maintaining data accuracy where needed while reducing overall processing overhead.

Inventive Principle:
Principle #16Partial or excessive action

3Loss of time

If larger adjustment steps are used in calibration, then convergence speed is improved, but manufacturing precision deteriorates due to overshooting optimal values

Engineering Contradiction:
Improvecalibration timeVSAvoidprocessing level accuracy
Core Design Contradiction:
Loss of timeVSManufacturing precision

Solution Approach 1:

The patent implements dynamic step size adjustment where the calibration step magnitude changes based on the current state of calibration progress. Larger steps are used when far from the optimal value to accelerate convergence, while smaller steps are applied near the optimum to achieve precise settling. This dynamic adaptation of step size resolves the contradiction between convergence speed and precision.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the calibration parameter (step size) based on the calibration process state. The system monitors convergence progress and adjusts the step magnitude accordingly, transforming a fixed parameter into a variable one that adapts to the calibration phase, thereby achieving both fast convergence and high precision.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11733929B2Memory system with dynamic calibration using a variable adjustment mechanism
Publication Date: 2023.08.22 MICRON TECHNOLOGY INC
  • US11733929B2 patent drawing
  • US11733929B2 patent drawing
  • US11733929B2 patent drawing

AI summary

A memory device includes a processing device configured to iteratively update a center read level according to a first step size after reading a subset of memory cells according to a set of read levels including the center read level; track an update direction for the processing device to use when iteratively updating the center read level, wherein the update direction corresponds to an increase or a decrease in the center read level; detect a change condition based on updating the center read level according to the first step size; and iteratively update the center read level according to a second step size based on detection of the change condition.