Dynamic Memory Refresh Rate Switching Without Mode Register
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Solution Overview
Problem
As DRAM densities increase, the refresh cycle time (tRFC) grows, impacting isochronous bandwidth and worst-case latency, and existing methods for adjusting refresh rates are either fixed or require mode register changes, limiting dynamic adjustment during system operation.
Innovation Solution
Implementing a method for dynamic on-the-fly switching of refresh rates without changing the mode register, allowing the memory controller to adjust refresh cycle times based on system conditions such as traffic and temperature, using different refresh modes like 1x, 2x, and 4x to optimize performance and reduce overhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If DRAM density is increased, then storage capacity is improved, but refresh cycle time increases impacting bandwidth and latency
Solution Approach 1:
The patent implements dynamic refresh rate adjustment by allowing the memory controller to change refresh rates on-the-fly without mode register changes. The system can switch between different refresh rates (e.g., 1x, 2x, 4x) based on system conditions such as temperature and traffic patterns, making the refresh mechanism adaptive rather than static.
Solution Approach 2:
The patent changes the refresh rate parameter dynamically based on system conditions. By monitoring temperature and traffic patterns, the system adjusts the refresh rate parameter to optimize performance - using faster refresh rates when needed and slower rates when conditions permit, thereby addressing the bandwidth and latency issues associated with high-density DRAM.
2Reliability
If refresh rate is adjusted using existing methods, then data validity is maintained, but system flexibility is limited due to fixed rates or mode register requirements
Solution Approach 1:
The patent enables the memory system to self-adjust refresh rates based on monitored system conditions. The memory controller automatically detects temperature and traffic patterns, then autonomously selects appropriate refresh rates without requiring external intervention or mode register changes, thereby maintaining both reliability and flexibility.
Solution Approach 2:
The patent implements a feedback mechanism where the memory controller continuously monitors system conditions (temperature, traffic patterns) and uses this information to dynamically adjust refresh rates. This closed-loop control ensures data validity is maintained while adapting to changing system conditions, resolving the contradiction between reliability and flexibility.
Data Source
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AI summary
On the fly switching from one memory device refresh rate to another is provided. Control logic associated with the memory device detects a condition to switch from a currently-applied refresh rate to a different refresh rate. In response to the condition, the refresh rate is dynamically switched. The switching does not require a change of a mode register. Thus, a refresh rate for the memory device can be dynamically changed on the fly.