Dynamic Memory Tester with Reconfigurable Slave Controllers
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Solution Overview
Problem
Current semiconductor testing systems are limited in their ability to concurrently test both volatile and non-volatile memory devices, lack flexibility in testing environments, and cannot replicate end-user conditions, making it difficult to predict and address memory failures in real-world scenarios.
Innovation Solution
A dynamic real-time testing system comprising a Master Controller Unit (MCU) that manages Slave Controller Units (SCUs) to perform parallel testing of volatile and non-volatile memories, with adjustable voltage, frequency, and temperature settings, allowing for comprehensive testing under various conditions similar to end-user systems.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If generic semiconductor testing equipment is used, then testing can be performed for specific memory types, but the system cannot concurrently test both volatile and non-volatile memories and lacks flexibility to replicate end-user conditions
Solution Approach 1:
The testing system is designed with a universal architecture that can test both volatile and non-volatile memory devices using the same hardware platform. The system incorporates multiple memory channels with different voltage regulators and control logic that can be dynamically configured to accommodate different memory types, eliminating the need for separate dedicated testing equipment for each memory category.
Solution Approach 2:
The system employs dynamic reconfiguration capabilities where testing parameters such as voltage levels, frequency, and temperature can be adjusted in real-time during operation. The memory channels can be dynamically assigned to different memory types based on testing requirements, and the system can switch between testing modes without requiring physical reconfiguration or system shutdown.
2Reliability
If fixed functional test patterns are used, then standard industry testing can be performed, but the system cannot replicate end-user conditions or predict real-world memory failures
Solution Approach 1:
The system enables continuous variation of operating parameters including voltage (DC levels), frequency (AC levels), and temperature to replicate real-world end-user conditions. These parameters can be dynamically adjusted during testing to stress memory devices under conditions that mimic actual deployment environments, thereby improving the accuracy of failure prediction while maintaining environmental flexibility.
Solution Approach 2:
The testing system creates virtual copies of end-user system environments by emulating host controller behavior, operating system memory management, and application workloads. This allows memory devices to be tested under conditions that closely replicate their actual operational context without requiring physical end-user systems, thereby improving failure prediction accuracy while preserving testing flexibility.
3Productivity
If separate testing systems are used for volatile and non-volatile memories, then each memory type can be tested with optimized parameters, but the system lacks productivity and increases testing time
Solution Approach 1:
The system merges multiple memory testing channels into a single integrated platform that can concurrently test both volatile and non-volatile memory devices. Each channel maintains independent control over voltage, frequency, and temperature parameters, allowing optimized testing for different memory types while achieving high throughput through parallel operation of multiple channels within the same system.
Solution Approach 2:
The testing system is segmented into independent memory channels, each capable of operating with optimized parameters for specific memory types. This segmentation allows simultaneous execution of different test configurations on different channels, thereby maintaining manufacturing precision for each memory type while significantly improving overall productivity through parallel processing.
Data Source
AI summary
A memory testing device uses a master control unit to concurrently operate multiple, intelligent, slave control units (SCUs). SCUs have one or more processing unit(s) (i.e. Finite State Machines, micro controllers, processors) capable of processing one or more firmware with or without operating system (i.e. bare-metal, embedded OS, RTOS (real time operating system)) to perform a series of task defined by firmware(s) for testing volatile and/or non-volatile memory devices connected into one or more DUT devices plus SCU has capability of having operating system and install and run host applications locally within each SCU units to mimic host applications environments along with performing regular memory testing.