Dynamic Metadata Relocation in DRAM for Latency Reduction

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Solution Overview

Problem

Memory latency in computing devices is increased due to conflicts between memory transactions in DRAM, where metadata is not stored in the same row as the associated data, leading to higher access times and potential performance issues in critical applications.

Innovation Solution

A method for dynamically relocating metadata from a virtual page that does not map to the same DRAM row as the associated data to that same DRAM row, allowing concurrent access and reducing conflicts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If metadata is stored in a separate memory page from the associated data, then memory organization is simplified and metadata management is easier, but memory latency increases due to row conflicts in DRAM

Engineering Contradiction:
Improvememory organizationVSAvoidmemory latency
Core Design Contradiction:
Device complexityVSLoss of time

Solution Approach 1:

The patent merges metadata and associated data into the same DRAM row by dynamically relocating metadata from its original memory page to the data page containing the associated data. This combination ensures that both data and metadata are accessed within the same DRAM row, eliminating row conflicts and reducing memory latency while maintaining simplified memory organization through a unified access mechanism.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent implements dynamic metadata relocation where the metadata location is not fixed but is determined at access time based on the data location. The memory controller dynamically calculates the metadata location using a hash function or other mapping mechanism, allowing metadata to be positioned optimally in the same DRAM row as its associated data, thereby adapting to different data access patterns and minimizing conflicts.

Inventive Principle:
Principle #15Dynamics

2Loss of time

If metadata is stored in the same DRAM row as the associated data, then memory latency is reduced by avoiding row conflicts, but memory organization becomes more complex

Engineering Contradiction:
Improvememory latencyVSAvoidmemory organization
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent introduces a memory controller as an intermediary that manages the complex metadata relocation process. The memory controller performs hash calculations, determines metadata locations, and coordinates the dynamic placement of metadata into the appropriate data pages. This intermediary handles the organizational complexity, allowing the underlying memory structure to remain relatively simple while achieving low-latency access through intelligent mediation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the organizational parameters of memory by introducing hash-based addressing and dynamic page allocation for metadata. Instead of fixed metadata pages, the system uses hash functions to determine metadata locations based on data addresses, transforming the memory organization from a static page-based structure to a dynamic, data-driven structure that optimizes for access latency while managing complexity through mathematical mapping.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If dynamic metadata relocation is implemented, then memory access efficiency is improved by reducing conflicts, but processing overhead increases due to additional lookup operations

Engineering Contradiction:
Improvememory access efficiencyVSAvoidprocessing overhead
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent performs preliminary hashing and metadata location calculation during the memory access request processing stage, before the actual data transfer occurs. By pre-determining the metadata location using hash functions and preparing the metadata fetch operation in advance, the system minimizes the critical path delay. This preliminary action ensures that metadata is ready simultaneously with data, maximizing access efficiency while keeping processing overhead confined to the control logic rather than the data path.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP4281874B1Dynamic metadata relocation in memory
Publication Date: 2024.11.13 QUALCOMM INC
  • EP4281874B1 patent drawingFigure 1
  • EP4281874B1 patent drawingFigure 2
  • EP4281874B1 patent drawingFigure 3

AI summary

Metadata is dynamically relocated in a DRAM from a virtual page that does not map to the same DRAM row in which the associated data is located, to that same DRAM row. If the target of a data access request is a location in a first page that is configured to store metadata rather than data, then a second location in a second page may be determined, and the requested data may be accessed at the second location. The associated metadata may be accessed at the location in the first page, which is configured in the virtual domain to store data but is configured in the physical domain to store the metadata associated with the data in the first page.