Dynamic Minibatch Resizing for Neural Network Memory Constraints

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Solution Overview

Problem

Training large-scale deep neural networks is computationally intensive and memory bandwidth limited due to the need to process large minibatches that often exceed the capacity of on-chip memory, leading to inefficiencies in resource utilization and performance.

Innovation Solution

Implementing dynamic spatial minibatching, where the minibatch is broken down into smaller spatial minibatches that fit within on-chip memory, allowing each layer to process outputs immediately without waiting for the entire minibatch to complete, thereby reducing memory bandwidth usage and enhancing compute efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If large minibatches are used to process more data in parallel, then productivity is improved, but the minibatch size exceeds on-chip memory capacity causing increased memory bandwidth usage and loss of time

Engineering Contradiction:
Improveprocessing throughputVSAvoidwaiting time for memory operations
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent divides a large minibatch into multiple smaller spatial minibatches that can be processed independently. Each spatial minibatch is sized to fit within on-chip memory, allowing layers to complete processing without waiting for the entire large minibatch. This segmentation resolves the contradiction by enabling parallel processing of multiple small batches instead of waiting for one large batch to complete memory operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent dynamically adjusts the minibatch size based on available on-chip memory capacity. Rather than using a fixed large minibatch size, the system adapts the minibatch dimensions to match the hardware constraints, allowing optimal utilization of on-chip memory while maintaining high processing throughput through dynamic resizing.

Inventive Principle:
Principle #15Dynamics

2Productivity

If large minibatches are used to improve processing efficiency, then productivity is improved, but off-chip memory access increases leading to bandwidth limitations and performance degradation

Engineering Contradiction:
Improvecompute efficiencyVSAvoidmemory bandwidth consumption
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

By segmenting the large minibatch into smaller spatial minibatches that fit within on-chip memory, the patent eliminates the need for frequent off-chip memory accesses. Each spatial minibatch can be fully processed using only on-chip memory resources, dramatically reducing memory bandwidth consumption while maintaining high compute efficiency through continuous processing.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent loads and processes spatial minibatches using pre-fetched data that fits within on-chip memory before moving to the next batch. This preliminary action of preparing and processing data within available memory capacity prevents the need for repeated off-chip accesses during computation, reducing overall memory bandwidth requirements.

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If the entire minibatch must complete before the next layer processes, then measurement precision of gradient estimation is improved, but loss of time increases due to sequential processing

Engineering Contradiction:
Improvegradient estimation accuracyVSAvoidprocessing time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent segments the minibatch processing into multiple spatial minibatches that can be handled by different layers concurrently. While maintaining gradient estimation accuracy through proper accumulation across spatial minibatches, the system allows layer N to begin processing spatial minibatch 1 while layer N-1 is still processing subsequent spatial minibatches, eliminating the sequential waiting time.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent enables continuous processing by allowing the next layer to immediately process the output of the previous layer as soon as it is available, rather than waiting for the entire minibatch to complete. This continuity of useful action maintains gradient accuracy through proper synchronization while eliminating idle waiting time between layers.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS11354573B2Dynamically resizing minibatch in neural network execution
Publication Date: 2022.06.07 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US11354573B2 patent drawing
  • US11354573B2 patent drawing
  • US11354573B2 patent drawing

AI summary

A minibatch in a neural network execution may be dynamically resized based on on-chip memory. For example, a size of the minibatch is configured such that the minibatch fits within on-chip memory. The size of the minibatch may be resized for a sequence of layers in the neural network execution. A next layer's execution can commence responsive to the resized minibatch being completed in a previous layer without having to wait for all of the minibatch to be completed in the previous layer.