Dynamic Netlists for Runtime Trigger Reprogramming
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Solution Overview
Problem
Conventional trigger circuits in emulation systems cannot be dynamically changed during runtime, limiting the ability to redefine trigger conditions without recompiling the entire design, and restrict the use of optimized-out signals, making it difficult to define complex Boolean conditions.
Innovation Solution
The implementation of dynamic netlists within the emulator allows for the reconstruction of optimized-out signals and the evaluation of arbitrary Boolean expressions during runtime, enabling the dynamic modification of trigger conditions without recompilation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional trigger circuits are used in emulation systems, then the system structure is simple and reliable, but the trigger conditions cannot be dynamically changed during runtime and require recompilation of the entire design
Solution Approach 1:
The patent implements dynamic trigger circuits that can be reconfigured during runtime without recompilation. The trigger conditions are stored in programmable logic devices that can be dynamically programmed to evaluate different Boolean expressions at different times, allowing the system to adapt trigger conditions on-the-fly while maintaining structural simplicity.
Solution Approach 2:
The trigger evaluation function is segmented from the main design compilation process. Instead of compiling the entire design when trigger conditions change, only the trigger evaluation logic is reprogrammed in the programmable logic device, isolating the recompilation overhead to a minimal subset of the system.
2Adaptability or versatility
If conventional trigger circuits are used, then the device complexity is low, but complex Boolean conditions cannot be evaluated and optimized-out signals cannot be used
Solution Approach 1:
The programmable logic device serves multiple functions: it evaluates complex Boolean expressions, accesses optimized-out signals through the design database, and can be reprogrammed for different trigger conditions. This universal component handles both simple and complex trigger evaluation without requiring separate dedicated circuits for each function.
Solution Approach 2:
The patent introduces an intermediary interface between the trigger circuit and the design database. This intermediary allows the trigger circuit to access optimized-out signals that were eliminated during compilation by providing a mapping mechanism that reconstructs these signals through the programmable logic device without requiring direct access to the original design structures.
3Reliability
If the entire design is recompiled to change trigger conditions, then all signal definitions are updated, but the compilation process takes several hours and reduces productivity
Solution Approach 1:
The system performs preliminary actions by maintaining the design database and signal definitions during compilation, and then uses this pre-computed information during runtime trigger reconfiguration. When trigger conditions need to change, the system queries the existing design database rather than recompiling, leveraging the preliminary work already done during the compilation phase.
Solution Approach 2:
The patent extracts the trigger evaluation function from the main compilation process. By separating trigger condition definition and evaluation from the overall design compilation, the system can modify trigger conditions by only reprogramming the trigger evaluation logic in the programmable logic device, while the rest of the compiled design remains unchanged and can be reused.
Data Source
AI summary
An improved emulation system having an improved trigger mechanism is disclosed. During the compilation of the circuit design, a portion of the emulation resources are reserved for dynamic netlists. The dynamic netlists allows a user to create arbitrary trigger circuits that can be based on any signal generated by the device under test during run time, including signals that were optimized out of the design during the compilation process. The dynamic netlists can be loaded and used in the emulator without having to recompile the entire design, which could take many hours. This enables a user to quickly and efficiently debug circuit designs.